Hierarchical Characterization of Analog Integrated CMOS Circuits. - Josef Eckmüller; Martin Groepl; Helmut E. Graeb (DATE, 1998)

Fast calculation of analog circuits' feasibility regions by low level functional measures. - Stephan Zizala; Josef Eckmüller; Helmut Gräb (ICECS, 1998)

Automating the Sizing of Analog CMOS Circuits by Consideration of Structural Constraints. - Robert Schwencker; Josef Eckmüller; Helmut E. Graeb; Kurt Antreich (DATE, 1999)

WiCkeD: analog circuit synthesis incorporating mismatch. - Kurt Antreich; Josef Eckmüller; Helmut Graeb; Michael Pronath; Frank Schenkel; Robert Schwencker; Stephan Zizala (CICC, 2000)

The Sizing Rules Method for Analog Integrated Circuit Design. - Helmut E. Graeb; Stephan Zizala; Josef Eckmüller; Kurt Antreich (ICCAD, 2001)

From algorithm to first 3.5G call in record time: a novel system design approach based on virtual prototyping and its consequences for interdisciplinary system design teams. - M. Brandenburg; A. Schöllhorn; S. Heinen; Josef Eckmüller; T. Eckart (DATE, 2007)

Electronic System Level Power and Performance Analysis for Multi-Processor-System-on-Chip. - Muhammad Mudussir Ayub; Habibullah Ahmadzay; Josef Eckmüller; Franz Kreupl (ReConFig, 2019)