Proportional BIC sensor for current testing. - Josep Rius 001; Joan Figueras (J. Electron. Test., 1992)

Detecting IDDQ defective CMOS circuits by depowering. - Josep Rius 001; Joan Figueras (VTS, 1995)

Dynamic characterization of Built-In Current Sensors based on PN junctions: Analysis and experiments. - Josep Rius 001; Joan Figueras (J. Electron. Test., 1996)

IDDQ testing: state of the art and future trends. - Antoni Ferré; Eugeni Isern 001; Josep Rius 001; Rosa Rodríguez-Montañés; Joan Figueras (Integr., 1998)

Exploring the Combination of IDDQ and iDDt Testing: Energy Testing. - Josep Rius 001; Joan Figueras (DATE, 1999)

Comparison of IDDQ Testing and Very-Low Voltage Testing. - Bram Kruseman; Stefan van den Oetelaar; Josep Rius 001 (ITC, 2002)

On the selection of efficient arithmetic additive test pattern generators [logic test]. - Salvador Manich; L. García; Luz Balado; Emili Lupon; Josep Rius 001; Rosa Rodríguez-Montañés; Joan Figueras (ETW, 2003)

Power and Energy Consumption of CMOS Circuits: Measurement Methods and Experimental Results. - Josep Rius 001; Alejandro Peidro; Salvador Manich; Rosa Rodríguez-Sánchez (PATMOS, 2003)

Power Supply Noise Monitor for Signal Integrity Faults. - Josep Rius Vázquez; José Pineda de Gyvez (DATE, 2004)

BIST Technique by Equally Spaced Test Vector Sequences. - Salvador Manich; L. García; Luz Balado; Emili Lupon; Josep Rius 001; Rosa Rodríguez-Montañés; Joan Figueras (VTS, 2004)

Built-in Current Sensor for ?I{DDQ} Testing of Deep Submicron Digital CMOS ICs. - Josep Rius Vázquez; José Pineda de Gyvez (VTS, 2004)

Built-in current sensor for ΔIDDQ testing. - Josep Rius Vázquez; José Pineda de Gyvez (IEEE J. Solid State Circuits, 2004)

An Activity Monitor for Power/Performance Tuning of CMOS Digital Circuits. - Josep Rius 001; Maurice Meijer; José Pineda de Gyvez (J. Low Power Electron., 2006)

A Voltage-Mode Testing Method to Detect IDDQ Defects in Digital Circuits. - Josep Rius 001; Luis Elvira Villagra; Maurice Meijer (ETS, 2009)

Analysis of the extra delay on interconnects caused by resistive opens and shorts. - Pablo Maqueda; Josep Rius 001 (IOLTS, 2009)

Analysis of the Influence of Substrate on the Performance of On-Chip MOS Decoupling Capacitors. - Josep Rius 001; Maurice Meijer (IEEE J. Solid State Circuits, 2009)

A single conductive surface as communication media for networked devices. - Josep Rius 001 (BODYNETS, 2010)

Two-dimensional communication of networked devices through a single conductive surface. - Josep Rius 001 (INSS, 2010)

A method for detecting resistive opens in buses. - Josep Rius 001 (IOLTS, 2010)

IR-Drop in On-Chip Power Distribution Networks of ICs With Nonuniform Power Consumption. - Josep Rius 001 (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Supply Noise and Impedance of On-Chip Power Distribution Networks in ICs With Nonuniform Power Consumption and Interblock Decoupling Capacitors. - Josep Rius 001 (IEEE Trans. Very Large Scale Integr. Syst., 2015)