De-pipeline a software-pipelined loop. - Bogong Su; Jian Wang 046; Erh-Wen Hu; Joseph B. Manzano (ICASSP (2), 2003)

Loop optimization with tradeoff between cycle count and code size for DSP applications. - Bogong Su; Jian Wang 046; Rafi Rabipour; Erh-Wen Hu; Joseph B. Manzano (EUSIPCO, 2004)

Software De-Pipelining Technique. - Bogong Su; Jian Wang 046; Erh-Wen Hu; Joseph B. Manzano (SCAM, 2004)

Identifying Multiply-Add Operations in Kylin Compiler. - Haiping Wu; Ziang Hu; Joseph B. Manzano; Yingping Zhang; Guang R. Gao (ESA, 2005)

Madd Operation Aware Redundancy Elimination. - Haiping Wu; Ziang Hu; Joseph B. Manzano; Guang R. Gao (Int. J. Softw. Eng. Knowl. Eng., 2005)

A User-Friendly Methodology for Automatic Exploration of Compiler Options. - Haiping Wu; Long Chen 020; Joseph B. Manzano; Guang R. Gao (Software Engineering Research and Practice, 2006)

Toward an Automatic Code Layout Methodology. - Joseph B. Manzano; Ziang Hu; Yi Jiang; Ge Gan; Hyo-Jung Song; Jung-Gyu Park (IWOMP, 2007)

A Quantitative Study of the On-Chip Network and Memory Hierarchy Design for Many-Core Processor. - Xu Wang; Ge Gan; Joseph B. Manzano; Dongrui Fan; Shuxu Guo (ICPADS, 2008)

Tile Percolation: An OpenMP Tile Aware Parallelization Technique for the Cyclops-64 Multicore Processor. - Ge Gan; Xu Wang; Joseph B. Manzano; Guang R. Gao (Euro-Par, 2009)

Tile Reduction: The First Step towards Tile Aware Parallelization in OpenMP. - Ge Gan; Xu Wang; Joseph B. Manzano; Guang R. Gao (IWOMP, 2009)

TL-DAE: Thread-Level Decoupled Access/Execution for OpenMP on the Cyclops-64 Many-Core Processor. - Ge Gan; Joseph B. Manzano (LCPC, 2009)

A Study of a Software Cache Implementation of the OpenMP Memory Model for Multicore and Manycore Architectures. - Chen Chen 067; Joseph B. Manzano; Ge Gan; Guang R. Gao; Vivek Sarkar (Euro-Par (2), 2010)

The elephant and the mice: the role of non-strict fine-grain synchronization for modern many-core architectures. - Juergen Ributzka; Yuhei Hayashi; Joseph B. Manzano; Guang R. Gao (ICS, 2011)

OPELL and PM: A Case Study on Porting Shared Memory Programming Models to Accelerators Architectures. - Joseph B. Manzano; Ge Gan; Juergen Ributzka; Sunil Shrestha; Guang R. Gao (LCPC, 2011)

The Role of Non-strict Fine-grain Synchronization. - Juergen Ributzka; Joseph B. Manzano; Guang R. Gao (High Performance Computing Workshop (2), 2012)

Fast and Accurate Simulation of the Cray XMT Multithreaded Supercomputer. - Oreste Villa; Antonino Tumeo; Simone Secchi; Joseph B. Manzano (IEEE Trans. Parallel Distributed Syst., 2012)

ACDT: Architected Composite Data Types trading-in unfettered data access for improved execution. - Andres Marquez 001; Joseph B. Manzano; Shuaiwen Leon Song; Benoît Meister; Sunil Shrestha; Thomas St. John; Guang R. Gao (ICPADS, 2014)

Jagged Tiling for Intra-tile Parallelism and Fine-Grain Multithreading. - Sunil Shrestha; Joseph B. Manzano; Andrés Márquez 001; John Feo; Guang R. Gao (LCPC, 2014)

Power and performance trade-offs for Space Time Adaptive Processing. - Nitin A. Gawande; Joseph B. Manzano; Antonino Tumeo; Nathan R. Tallent; Darren J. Kerbyson; Adolfy Hoisie (ASAP, 2015)

Optimizing irregular applications for energy and performance on the Tilera many-core architecture. - Daniel G. Chavarría-Miranda; Ajay Panyala; Mahantesh Halappanavar; Joseph B. Manzano; Antonino Tumeo (Conf. Computing Frontiers, 2015)

Locality aware concurrent start for stencil applications. - Sunil Shrestha; Guang R. Gao; Joseph B. Manzano; Andrés Márquez 001; John Feo (CGO, 2015)

Gregarious Data Re-structuring in a Many Core Architecture. - Sunil Shrestha; Joseph B. Manzano; Andrés Márquez 001; Stéphane Zuckerman; Shuaiwen Song; Guang R. Gao (HPCC/CSS/ICESS, 2015)

On the Impact of Execution Models: A Case Study in Computational Chemistry. - Daniel G. Chavarría-Miranda; Mahantesh Halappanavar; Sriram Krishnamoorthy; Joseph B. Manzano; Abhinav Vishnu; Adolfy Hoisie (IPDPS Workshops, 2015)

Application characterization at scale: lessons learned from developing a distributed open community runtime system for high performance computing. - Joshua Landwehr; Joshua Suetterlein; Andres Marquez 001; Joseph B. Manzano; Guang R. Gao (Conf. Computing Frontiers, 2016)

Extending the Roofline Model for Asynchronous Many-Task Runtimes. - Joshua D. Suetterlein; Joshua Landwehr; Andrés Márquez 001; Joseph B. Manzano; Guang R. Gao (CLUSTER, 2016)

Asynchronous Runtimes in Action: An Introspective Framework for a Next Gen Runtime. - Joshua Suetterlein; Joshua Landwehr; Andrés Márquez 001; Joseph B. Manzano; Guang R. Gao (IPDPS Workshops, 2016)

Algorithm and Architecture Independent Benchmarking with SEAK. - Nathan R. Tallent; Joseph B. Manzano; Nitin A. Gawande; Seunghwa Kang; Darren J. Kerbyson; Adolfy Hoisie; Joseph K. Cross (IPDPS, 2016)

Designing Scalable Distributed Memory Models: A Case Study. - Joshua Landwehr; Joshua Suetterlein; Joseph B. Manzano; Andrés Márquez 001; Kevin J. Barker; Guang R. Gao (Conf. Computing Frontiers, 2017)

Verification of the Extended Roofline Model for Asynchronous Many Task Runtimes. - Joshua Suetterlein; Joshua Landwehr; Andres Marquez 001; Joseph B. Manzano; Kevin J. Barker; Guang R. Gao (ESPM2@SC, 2017)

User-transparent Distributed TensorFlow. - Abhinav Vishnu; Joseph B. Manzano; Charles Siegel; Jeff Daily (CoRR, 2017)

Exploring performance and energy tradeoffs for irregular applications: A case study on the Tilera many-core architecture. - Ajay Panyala; Daniel G. Chavarría-Miranda; Joseph B. Manzano; Antonino Tumeo; Mahantesh Halappanavar (J. Parallel Distributed Comput., 2017)

Comparative analysis of soft-error detection strategies: a case study with iterative methods. - Gokcen Kestor; Burcu Ozcelik Mutlu; Joseph B. Manzano; Omer Subasi; Osman S. Unsal; Sriram Krishnamoorthy (CF, 2018)

Characterization of the Impact of Soft Errors on Iterative Methods. - Burcu Ozcelik Mutlu; Gokcen Kestor; Joseph B. Manzano; Osman S. Unsal; Samrat Chatterjee; Sriram Krishnamoorthy (HiPC, 2018)

A Parallel Graph Environment for Real-World Data Analytics Workflows. - Vito Giovanni Castellana; Maurizio Drocco; John Feo; Jesun Sahariar Firoz; Thejaka Amila Kanewala; Andrew Lumsdaine; Joseph B. Manzano; Andres Marquez 001; Marco Minutoli; Joshua Suetterlein; Antonino Tumeo; Marcin Zalewski (DATE, 2019)

Invited: Software Defined Accelerators From Learning Tools Environment. - Antonino Tumeo; Marco Minutoli; Vito Giovanni Castellana; Joseph B. Manzano; Vinay Amatya; David Brooks 001; Gu-Yeon Wei (DAC, 2020)

On the Marriage of Asynchronous Many Task Runtimes and Big Data: A Glance. - Joshua Suetterlein; Joseph B. Manzano; Andres Marquez 001; Guang R. Gao (HiPC, 2020)

SODA: a New Synthesis Infrastructure for Agile Hardware Design of Machine Learning Accelerators. - Marco Minutoli; Vito Giovanni Castellana; Cheng Tan 002; Joseph B. Manzano; Vinay Amatya; Antonino Tumeo; David Brooks 001; Gu-Yeon Wei (ICCAD, 2020)

Towards Automatic and Agile AI/ML Accelerator Design with End-to-End Synthesis. - Jeff Jun Zhang; Nicolas Bohm Agostini; Shihao Song; Cheng Tan 002; Ankur Limaye; Vinay Amatya; Joseph B. Manzano; Marco Minutoli; Vito Giovanni Castellana; Antonino Tumeo; Gu-Yeon Wei; David Brooks 001 (ASAP, 2021)

Automated Generation of Integrated Digital and Spiking Neuromorphic Machine Learning Accelerators. - Serena Curzel; Nicolas Bohm Agostini; Shihao Song; Ismet Dagli; Ankur Limaye; Cheng Tan 002; Marco Minutoli; Vito Giovanni Castellana; Vinay Amatya; Joseph B. Manzano; Anup Das 001; Fabrizio Ferrandi; et al. (ICCAD, 2021)

LC-MEMENTO: A Memory Model for Accelerated Architectures. - Kiran Ranganath; Jesun Firoz; Joshua Suetterlein; Joseph B. Manzano; Andres Marquez 001; Mark Raugas; Daniel Wong 001 (LCPC, 2021)

MAPA: multi-accelerator pattern allocation policy for multi-tenant GPU servers. - Kiran Ranganath; Joshua D. Suetterlein; Joseph B. Manzano; Shuaiwen Leon Song; Daniel Wong 001 (SC, 2021)

The SODA approach: leveraging high-level synthesis for hardware/software co-design and hardware specialization: invited. - Nicolas Bohm Agostini; Serena Curzel; Ankur Limaye; Vinay Amatya; Marco Minutoli; Vito Giovanni Castellana; Joseph B. Manzano; Antonino Tumeo; Fabrizio Ferrandi (DAC, 2022)

SO(DA)2: End-to-end Generation of Specialized Reconfigurable Architectures (Invited Talk). - Antonino Tumeo; Nicolas Bohm Agostini; Serena Curzel; Ankur Limaye; Cheng Tan 002; Vinay Amatya; Marco Minutoli; Vito Giovanni Castellana; Ang Li 006; Joseph B. Manzano (PARMA-DITAM@HiPEAC, 2022)

From High-Level Frameworks to custom Silicon with SODA. - Serena Curzel; Nicolas Bohm Agostini; Reece Neff; Ankur Limaye; Jeff Jun Zhang; Vinay Amatya; Marco Minutoli; Vito Giovanni Castellana; Joseph B. Manzano; David Brooks 001; Gu-Yeon Wei; Fabrizio Ferrandi; et al. (HCS, 2022)

An MLIR-based Compiler Flow for System-Level Design and Hardware Acceleration. - Nicolas Bohm Agostini; Serena Curzel; Vinay Amatya; Cheng Tan 002; Marco Minutoli; Vito Giovanni Castellana; Joseph B. Manzano; David R. Kaeli; Antonino Tumeo (ICCAD, 2022)

SODA Synthesizer: An Open-Source, Multi-Level, Modular, Extensible Compiler from High-Level Frameworks to Silicon. - Nicolas Bohm Agostini; Ankur Limaye; Marco Minutoli; Vito Giovanni Castellana; Joseph B. Manzano; Antonino Tumeo; Serena Curzel; Fabrizio Ferrandi (ICCAD, 2022)

Extending an asynchronous runtime system for high throughput applications: A case study. - Joshua Suetterlein; Joseph B. Manzano; Andres Marquez 001; Guang R. Gao (J. Parallel Distributed Comput., 2022)

Bridging Python to Silicon: The SODA Toolchain. - Nicolas Bohm Agostini; Serena Curzel; Jeff Jun Zhang; Ankur Limaye; Cheng Tan 002; Vinay Amatya; Marco Minutoli; Vito Giovanni Castellana; Joseph B. Manzano; David Brooks 001; Gu-Yeon Wei; Antonino Tumeo (IEEE Micro, 2022)

End-to-End Synthesis of Dynamically Controlled Machine Learning Accelerators. - Serena Curzel; Nicolas Bohm Agostini; Vito Giovanni Castellana; Marco Minutoli; Ankur Limaye; Joseph B. Manzano; Jeff Zhang 001; David Brooks 001; Gu-Yeon Wei; Fabrizio Ferrandi; Antonino Tumeo (IEEE Trans. Computers, 2022)

Towards On-Chip Learning for Low Latency Reasoning with End-to-End Synthesis. - Vito Giovanni Castellana; Nicolas Bohm Agostini; Ankur Limaye; Vinay Amatya; Marco Minutoli; Joseph B. Manzano; Antonino Tumeo; Serena Curzel; Michele Fiorito; Fabrizio Ferrandi (ASP-DAC, 2023)

Denial of Service Attack Detection via Differential Analysis of Generalized Entropy Progressions. - Omer Subasi; Joseph B. Manzano; Kevin J. Barker (CSR, 2023)

Finding Your Niche: An Evolutionary Approach to HPC Topologies. - Stephen J. Young; Joshua Suetterlein; Jesun Firoz; Joseph B. Manzano; Kevin J. Barker (HPEC, 2023)

Assessing Risk in High Performance Computing Attacks. - Erika A. Leal; Cimone Wright-Hamor; Joseph B. Manzano; Nicholas J. Multari; Kevin J. Barker; David O. Manz; Jiang Ming 002 (ICISSP, 2023)

Evaluating Energy Efficiency of GPUs using Machine Learning Benchmarks. - Brett Foster; Shubbhi Taneja; Joseph B. Manzano; Kevin J. Barker (IPDPS Workshops, 2023)

The Landscape of Modern Machine Learning: A Review of Machine, Distributed and Federated Learning. - Omer Subasi; Oceane Bel; Joseph B. Manzano; Kevin J. Barker (CoRR, 2023)

Towards Automated Generation of Chiplet-Based Systems Invited Paper. - Ankur Limaye; Claudio Barone; Nicolas Bohm Agostini; Marco Minutoli; Joseph B. Manzano; Vito Giovanni Castellana; Giovanni Gozzi; Michele Fiorito; Serena Curzel; Fabrizio Ferrandi; Antonino Tumeo (ASPDAC, 2024)

Cookie-Jar: An Adaptive Re-configurable Framework for Wireless Network Infrastructures. - Oceane Bel; Burcu Ozcelik Mutlu; Joseph B. Manzano; Cimone Wright-Hamor; Omer Subasi; Kevin J. Barker (CF, 2024)

HPC Network Simulation Tuning via Automatic Extraction of Hardware Parameters. - Joshua Suetterlein; Stephen J. Young; Jesun Firoz; Joseph B. Manzano; Nathan R. Tallent; Ryan D. Friese; Kevin J. Barker; Timothy Stavenger (HPEC, 2024)

Extending High-Level Synthesis with AI/ML Methods. - Nicolas Bohm Agostini; Giovanni Gozzi; Michele Fiorito; Claudio Barone; Serena Curzel; Ankur Limaye; Marco Minutoli; Vito Giovanni Castellana; Joseph B. Manzano; Fabrizio Ferrandi; Antonino Tumeo (ICCAD, 2024)

Automatic Extraction of Network Configurations for Realistic Simulation and Validation. - Joshua Suetterlein; Stephen J. Young; Jesun Firoz; Joseph B. Manzano; Ryan D. Friese; Nathan R. Tallent; Kevin J. Barker; Timothy Stavenger (ISPASS, 2024)

Synchronization for CXL Based Memory. - Joshua Suetterlein; Joseph B. Manzano; Andres Marquez 001 (MEMSYS, 2024)

A Performance and Energy Study of GPU-Resident Preconditioners for Conjugate Gradient Solvers: In the Context of Existing and Novel Approaches. - Kasia Swirydowicz; Jesun Firoz; Joseph B. Manzano; Mahantesh Halappanavar; Stephen Thomas; Kevin J. Barker (SBAC-PAD, 2024)

A Critical Assessment of Interpretable and Explainable Machine Learning for Intrusion Detection. - Omer Subasi; Johnathan Cree; Joseph B. Manzano; Elena Peterson (CoRR, 2024)

Analysis and Benchmarking of feature reduction for classification under computational constraints. - Omer Subasi; Sayan Ghosh; Joseph B. Manzano; Bruce Palmer; Andrés Márquez 001 (Mach. Learn. Sci. Technol., 2024)

Reducing Communication Overhead in Federated Learning for Network Anomaly Detection with Adaptive Client Selection. - William Marfo; Deepak K. Tosh; Shirley V. Moore; Joshua Suetterlein; Joseph B. Manzano (CoRR, 2025)