Platform agnostic, scalable, and unobtrusive FPGA network processor design of moving target defense over IPv6 (MT6D) over IEEE 802.3 Ethernet. - Joseph Sagisi; Joseph G. Tront; Randy C. Marchany (HOST, 2017)

System architectural design of a hardware engine for moving target IPv6 defense over IEEE 802.3 Ethernet. - Joseph Sagisi; Joseph G. Tront; Randy C. Marchany (MILCOM, 2017)

An experimental framework for investigating hashgraph algorithm transaction speed. - John R. James; Daniel Hawthorne; Katherine Duncan; Aaron St. Leger; Joseph Sagisi; Michael Collins (BlockSys@SenSys, 2019)