A 1-ps Bin Size 4.87-ps Resolution FPGA Time-to-Digital Converter Based on Phase Wrapping Sorting and Selection. - Poki Chen; Joshua Adiel Wijaya; Seiji Kajihara; Trio Adiono; Hsiang-Yu Chen; Ruei-Ting Wang; Yousuke Miyake (IEEE Access, 2022)

Area Efficient 0.009-mm2 28.1-ppm/°C 11.3-MHz ALL-MOS Relaxation Oscillator. - Joshua Adiel Wijaya; Poki Chen; Lucky Kumar Pradhan; Ahmad Shahid Bhatti; Seiji Kajihara (IEEE Trans. Very Large Scale Integr. Syst., 2024)