A 64-way VLIW/SIMD FPGA architecture and design flow. - Alex K. Jones; Raymond Hoare; Ivan S. Kourtev; Joshua Fazekas; Dara Kusic; John Foster 001; Sedric Boddie; Ahmed Muaydh (ICECS, 2004)

An FPGA-based VLIW processor with custom hardware execution. - Alex K. Jones; Raymond Hoare; Dara Kusic; Joshua Fazekas; John Foster 001 (FPGA, 2005)

Extracting Speedup From C-Code With Poor Instruction-Level Parallelism. - Dara Kusic; Raymond Hoare; Alex K. Jones; Joshua Fazekas; John Foster 001 (IPDPS, 2005)

An automated, reconfigurable, low-power RFID tag. - Alex K. Jones; Raymond R. Hoare; Swapna R. Dontharaju; Shen Chih Tung; Ralph Sprang; Joshua Fazekas; James T. Cain; Marlin H. Mickle (DAC, 2006)

A Field Programmable RFID Tag and Associated Design Flow. - Alex K. Jones; Raymond R. Hoare; Swapna R. Dontharaju; Shen Chih Tung; Ralph Sprang; Joshua Fazekas; James T. Cain; Marlin H. Mickle (FCCM, 2006)

Rapid VLIW Processor Customization for Signal Processing Applications Using Combinational Hardware Functions. - Raymond R. Hoare; Alex K. Jones; Dara Kusic; Joshua Fazekas; John Foster 001; Shen Chih Tung; Michael L. McCloud (EURASIP J. Adv. Signal Process., 2006)

A VLIW Processor With Hardware Functions: Increasing Performance While Reducing Power. - Alex K. Jones; Raymond R. Hoare; Dara Kusic; Justin Stander; Gayatri Mehta; Joshua Fazekas (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

Reducing power while increasing performance with supercisc. - Alex K. Jones; Raymond Hoare; Dara Kusic; Gayatri Mehta; Joshua Fazekas; John Foster 001 (ACM Trans. Embed. Comput. Syst., 2006)

An automated, FPGA-based reconfigurable, low-power RFID tag. - Alex K. Jones; Raymond Hoare; Swapna R. Dontharaju; Shen Chih Tung; Ralph Sprang; Joshua Fazekas; James T. Cain; Marlin H. Mickle (Microprocess. Microsystems, 2007)