An 8T SRAM cell with column-based dynamic supply voltage for bit-interleaving. - Anh-Tuan Do; Kiat Seng Yeo; Jeremy Yung Shern Low; Joshua Yung Lih Low; Zhi-Hui Kong (APCCAS, 2010)

High accuracy binary logarithmic conversion using range mapping for DSP applications. - Joshua Yung Lih Low; Ching-Chuen Jong (APCCAS, 2010)

An 8T Differential SRAM With Improved Noise Margin for Bit-Interleaving in 65 nm CMOS. - Anh-Tuan Do; Jeremy Yung Shern Low; Joshua Yung Lih Low; Zhi-Hui Kong; Xiaoliang Tan; Kiat Seng Yeo (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion. - Howard Tang; Joshua Yung Lih Low; Jeremy Yung Shern Low; Liter Siek; Ching-Chuen Jong; Chip-Hong Chang (APCCAS, 2012)

A fast and compact circuit for integer square root computation based on Mitchell logarithmic method. - Joshua Yung Lih Low; Ching-Chuen Jong; Jeremy Yung Shern Low; Thian Fatt Tay; Chip-Hong Chang (ISCAS, 2012)

Non-iterative high speed division computation based on Mitchell logarithmic method. - Joshua Yung Lih Low; Ching-Chuen Jong (ISCAS, 2013)

A Memory-Efficient Tables-and-Additions Method for Accurate Computation of Elementary Functions. - Joshua Yung Lih Low; Ching-Chuen Jong (IEEE Trans. Computers, 2013)

Unified Mitchell-Based Approximation for Efficient Logarithmic Conversion Circuit. - Joshua Yung Lih Low; Ching-Chuen Jong (IEEE Trans. Computers, 2015)

Range Mapping - A Fresh Approach to High Accuracy Mitchell-Based Logarithmic Conversion Circuit Design. - Joshua Yung Lih Low; Ching-Chuen Jong (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)