Register Allocation on Stream Processor with Local Register File. - Nan Wu 003; Mei Wen; Ju Ren 002; Yi He 008; Chunyuan Zhang (Asia-Pacific Computer Systems Architecture Conference, 2006)

Stream Algorithm for 4*4 Integer Transform in H.264. - Haiyan Li; Chunyuan Zhang; Ju Ren 002; Li Li 005; Dong Liu 022 (MUE, 2007)

FPGA-based Equivalent Simulation Technology (FEST) for clustered stream architecture. - Yi He 008; Ju Ren 002; Qianming Yang; Mei Wen; Nan Wu 003; Chunyuan Zhang (ACSAC, 2008)

On-Chip Memory System Optimization Design for the FT64 Scientific Stream Accelerator. - Mei Wen; Nan Wu 003; Chunyuan Zhang; Qianming Yang; Ju Ren 002; Yi He 008; Wei Wu; Jun Chai; Maolin Guan; Changqing Xun (IEEE Micro, 2008)

Transform coding on programmable stream processors. - Haiyan Li; Chunyuan Zhang; Li Li 005; Ju Ren 002 (J. Supercomput., 2008)

Software parallel CAVLC encoder based on stream processing. - Ju Ren 002; Yi He 008; Wei Wu; Mei Wen; Nan Wu 003; Chunyuan Zhang (ESTIMedia, 2009)

Cache streamization for high performance stream processor. - Nan Wu 003; Mei Wen; Ju Ren 002; Yi He 008; Changqing Xun; Wei Wu; Chunyuan Zhang (HiPC, 2009)

Streaming HD H.264 encoder on programmable processors. - Nan Wu 003; Mei Wen; Wei Wu; Ju Ren 002; Huayou Su; Changqing Xun; Chunyuan Zhang (ACM Multimedia, 2009)

Software Managed Instruction Scratchpad Memory Optimization in Stream Architecture Based on Hot Code Analysis of Kernels. - Yi He 008; Ju Ren 002; Mei Wen; Qianming Yang; Nan Wu 003; Chunyuan Zhang (DSD, 2010)

A Parallel Streaming Motion Estimation for Real-Time HD H.264 Encoding on Programmable Processors. - Ju Ren 002; Mei Wen; Chunyuan Zhang; Huayou Su; Yi He 008; Nan Wu 003 (FCST, 2010)

A Multilevel Parallel Intra Coding for H.264/AVC Based on CUDA. - Huayou Su; Nan Wu 003; Chunyuan Zhang; Mei Wen; Ju Ren 002 (ICIG, 2011)

High-efficient software parallel CAVLC encoder based on programmable stream processor. - Huayou Su; Chunyuan Zhang; Jun Chai; Mei Wen; Nan Wu 003; Ju Ren 002 (ACM Multimedia, 2011)

A high-efficient software parallel CAVCL encoder based on GPU. - Huayou Su; Chunyuan Zhang; Jun Chai; Mei Wen; Nan Wu 003; Ju Ren 002 (TSP, 2011)

Tiled Multi-Core Stream Architecture. - Nan Wu 003; Qianming Yang; Mei Wen; Yi He 008; Ju Ren 002; Maolin Guan; Chunyuan Zhang (Trans. High Perform. Embed. Archit. Compil., 2011)

Parallelization Design of Irregular Algorithms of Video Processing on GPUs. - Huayou Su; Jun Chai; Mei Wen; Ju Ren 002; Chunyuan Zhang (ICME, 2012)

A Parallel H.264 Encoder with CUDA: Mapping and Evaluation. - Nan Wu 003; Mei Wen; Huayou Su; Ju Ren 002; Chunyuan Zhang (ICPADS, 2012)

A Highly Parallel and Scalable Motion Estimation Algorithm with GPU for HEVC. - Yun-gang Xue; Huayou Su; Ju Ren 002; Mei Wen; Chunyuan Zhang; Li-Quan Xiao (Sci. Program., 2017)