An Algorithm for the Place-and-Route Problem in the Layout of Analog Circuits. - Juan A. Prieto; José M. Quintana; Adoración Rueda; José L. Huertas (ISCAS, 1994)

A performance-driven placement algorithm with simultaneous Place&Route optimization for analog ICs. - Juan A. Prieto; Adoración Rueda; José M. Quintana; José Luis Huertas (ED&TC, 1997)

An Approach to Realistic Fault Prediction and Layout Design for Testability in Analog Circuits. - Juan A. Prieto; Adoración Rueda; Ian Andrew Grout; Eduardo J. Peralías; José L. Huertas; Andrew Mark David Richardson (DATE, 1998)

DfT and on-line test of high-performance data converters: a practical case. - Eduardo J. Peralías; Adoración Rueda; Juan A. Prieto; José L. Huertas (ITC, 1998)