HW implementation of an execution manager for reconfigurable systems. - Javier Resano; Juan Antonio Clemente; Carlos González 002; Jose Luis Garcia; Daniel Mozos (ERSA, 2007)

A Hardware Task-Graph Scheduler for Reconfigurable Multi-tasking Systems. - Juan Antonio Clemente; Carlos González 002; Javier Resano; Daniel Mozos (ReConFig, 2008)

Efficiently scheduling runtime reconfigurations. - Javier Resano; Juan Antonio Clemente; Carlos González 002; Daniel Mozos; Francky Catthoor (ACM Trans. Design Autom. Electr. Syst., 2008)

A task graph execution manager for reconfigurable multi-tasking systems. - Juan Antonio Clemente; Carlos González 002; Javier Resano; Daniel Mozos (Microprocess. Microsystems, 2010)

A Hybrid Mapping-Scheduling Technique for Dynamically Reconfigurable Hardware. - Juan Antonio Clemente; Vincenzo Rana; Donatella Sciuto; Ivan Beretta; David Atienza (FPL, 2011)

A Replacement Technique to Maximize Task Reuse in Reconfigurable Systems. - Juan Antonio Clemente; Daniel Mozos; Javier Resano (IPDPS Workshops, 2011)

A Hardware Implementation of a Run-Time Scheduler for Reconfigurable Systems. - Juan Antonio Clemente; Javier Resano; Carlos González 002; Daniel Mozos (IEEE Trans. Very Large Scale Integr. Syst., 2011)

An approach to manage reconfigurations and reduce area cost in hard real-time reconfigurable systems. - Juan Antonio Clemente; Javier Resano; Daniel Mozos (ACM Trans. Embed. Comput. Syst., 2014)

A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms. - Juan Antonio Clemente; Ivan Beretta; Vincenzo Rana; David Atienza; Donatella Sciuto (ACM Trans. Reconfigurable Technol. Syst., 2014)

Configuration Mapping Algorithms to Reduce Energy and Time Reconfiguration Overheads in Reconfigurable Systems. - Juan Antonio Clemente; Elena Perez Ramo; Javier Resano; Daniel Mozos; Francky Catthoor (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Hardware implementation of a fault-tolerant Hopfield Neural Network on FPGAs. - Juan Antonio Clemente; Wassim Mansour; Rafic Ayoubi; Felipe Serrano 002; Hortensia Mecha; Haissam Ziade; Wassim El Falou; Raoul Velazco (Neurocomputing, 2016)

Hardware Architectural Support for Caching Partitioned Reconfigurations in Reconfigurable Systems. - Juan Antonio Clemente; Ruben Gran; Abel Chocano; Carlos del Prado; Javier Resano (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Reliability and Makespan Optimization of Hardware Task Graphs in Partially Reconfigurable Platforms. - Reza Ramezani; Yasser Sedaghat; Mahmoud Naghibzadeh; Juan Antonio Clemente (IEEE Trans. Aerosp. Electron. Syst., 2017)

Reliability Improvement of Hardware Task Graphs via Configuration Early Fetch. - Reza Ramezani; Yasser Sedaghat; Juan Antonio Clemente (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Analysis of the reconfiguration latency and energy overheads for a Xilinx Virtex-5 field-programmable gate array. - Javier Olivito; Felipe Serrano 002; Juan Antonio Clemente; Hortensia Mecha; Javier Resano (IET Comput. Digit. Tech., 2018)

A decomposition-based reliability and makespan optimization technique for hardware task graphs. - Reza Ramezani; Yasser Sedaghat; Mahmoud Naghibzadeh; Juan Antonio Clemente (Reliab. Eng. Syst. Saf., 2018)

Analytical reliability estimation of SRAM-based FPGA designs against single-bit and multiple-cell upsets. - Reza Ramezani; Juan Antonio Clemente; Francisco J. Franco (Reliab. Eng. Syst. Saf., 2020)

Impact of Ground-Level Enhancement (GLE) Solar Events on Soft Error Rate for Avionics. - Guillaume Hubert; Sébastien Aubry; Juan Antonio Clemente (IEEE Trans. Aerosp. Electron. Syst., 2020)

Thermal Neutron-induced SEUs on a COTS 28-nm SRAM-based FPGA under Different Incident Angles. - Juan Carlos Fabero; Golnaz Korkian; Francisco J. Franco; Hortensia Mecha; Manon Letiche; Juan Antonio Clemente (LATS, 2021)

Impact of DVS on Power Consumption and SEE Sensitivity of COTS Volatile SRAMs. - Mohammadreza Rezaei; Francisco J. Franco; Juan Carlos Fabero; Hortensia Mecha; Helmut Puchner; Juan Antonio Clemente (LATS, 2021)

Single Event Upsets Under Proton, Thermal, and Fast Neutron Irradiation in Emerging Nonvolatile Memories. - Golnaz Korkian; Daniel León; Francisco J. Franco; Juan Carlos Fabero; Manon Letiche; Yolanda Morilla; Pedro Martín-Holgado; Helmut Puchner; Hortensia Mecha; Juan Antonio Clemente (IEEE Access, 2022)

SEE sensitivity of a COTS 28-nm SRAM-based FPGA under thermal neutrons and different incident angles. - Juan Carlos Fabero; Golnaz Korkian; Francisco J. Franco; Guillaume Hubert; Hortensia Mecha; Manon Letiche; Juan Antonio Clemente (Microprocess. Microsystems, 2023)

Non-intrusive study on FPGA of the SEU sensitivity on the COTS RISC-V VeeR EH1 soft processor from Western Digital. - Daniel León; Juan Carlos Fabero; Juan Antonio Clemente (Microprocess. Microsystems, 2024)