Confidence Estimation for Branch Prediction Reversal. - Juan L. Aragón; José González 002; José M. García 001; Antonio González 001 (HiPC, 2001)

Selective Branch Prediction Reversal By Correlating with Data Values and Control Flow. - Juan L. Aragón; José González 002; José M. García 001; Antonio González 001 (ICCD, 2001)

Dual path instruction processing. - Juan L. Aragón; José González 002; Antonio González 001; James E. Smith 001 (ICS, 2002)

Power-Aware Control Speculation through Selective Throttling. - Juan L. Aragón; José González 002; Antonio González 001 (HPCA, 2003)

Energy-Efficient Design for Highly Associative Instruction Caches in Next-Generation Embedded Processors. - Juan L. Aragón; Dan Nicolaescu; Alexander V. Veidenbaum; Ana-Maria Badulescu (DATE, 2004)

Energy-Effective Instruction Fetch Unit for Wide Issue Processors. - Juan L. Aragón; Alexander V. Veidenbaum (Asia-Pacific Computer Systems Architecture Conference, 2005)

Control Speculation for Energy-Efficient Next-Generation Superscalar Processors. - Juan L. Aragón; José M. González; Antonio González 001 (IEEE Trans. Computers, 2006)

Sim-PowerCMP: A Detailed Simulator for Energy Consumption Analysis in Future Embedded CMP Architectures. - Antonio Flores; Juan L. Aragón; Manuel E. Acacio (AINA Workshops (1), 2007)

Adaptive VP decay: making value predictors leakage-efficient designs for high performance processors. - Juan M. Cebrian; Juan L. Aragón; José M. García 001; Stefanos Kaxiras (Conf. Computing Frontiers, 2007)

Efficient Message Management in Tiled CMP Architectures Using a Heterogeneous Interconnection Network. - Antonio Flores; Juan L. Aragón; Manuel E. Acacio (HiPC, 2007)

Leakage Energy Reduction in Value Predictors through Static Decay. - Juan M. Cebrian; Juan L. Aragón; José M. García 001 (IPDPS, 2007)

Address Compression and Heterogeneous Interconnects for Energy-Efficient High-Performance in Tiled CMPs. - Antonio Flores; Manuel E. Acacio; Juan L. Aragón (ICPP, 2008)

Optimizing CAM-based instruction cache designs for low-power embedded systems. - Juan L. Aragón; Alexander V. Veidenbaum (J. Syst. Archit., 2008)

An energy consumption characterization of on-chip interconnection networks for tiled CMP architectures. - Antonio Flores; Juan L. Aragón; Manuel E. Acacio (J. Supercomput., 2008)

REPAS: Reliable Execution for Parallel ApplicationS in Tiled-CMPs. - Daniel Sánchez 004; Juan L. Aragón; José M. García 001 (Euro-Par, 2009)

Efficient microarchitecture policies for accurately adapting to power constraints. - Juan M. Cebrian; Juan L. Aragón; José M. García 001; Pavlos Petoumenos; Stefanos Kaxiras (IPDPS, 2009)

Extending SRT for parallel applications in tiled-CMP architectures. - Daniel Sánchez 004; Juan L. Aragón; José M. García 001 (IPDPS, 2009)

MLP-Aware Instruction Queue Resizing: The Key to Power-Efficient Performance. - Pavlos Petoumenos; Georgia Psychou; Stefanos Kaxiras; Juan Manuel Cebrian Gonzalez; Juan L. Aragón (ARCS, 2010)

A log-based redundant architecture for reliable parallel computation. - Daniel Sánchez 004; Juan L. Aragón; José M. García 001 (HiPC, 2010)

Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects. - Antonio Flores; Juan L. Aragón; Manuel E. Acacio (PDP, 2010)

Exploiting address compression and heterogeneous interconnects for efficient message management in tiled CMPs. - Antonio Flores; Manuel E. Acacio; Juan L. Aragón (J. Syst. Archit., 2010)

Heterogeneous Interconnects for Energy-Efficient Message Management in CMPs. - Antonio Flores; Juan L. Aragón; Manuel E. Acacio (IEEE Trans. Computers, 2010)

Token3D: Reducing Temperature in 3D Die-Stacked CMPs through Cycle-Level Power Control Mechanisms. - Juan M. Cebrian; Juan L. Aragón; Stefanos Kaxiras (Euro-Par (1), 2011)

An analytical model for the calculation of the Expected Miss Ratio in faulty caches. - Daniel Sánchez 004; Yiannakis Sazeides; Juan L. Aragón; José M. García 001 (IOLTS, 2011)

Power Token Balancing: Adapting CMPs to Power Constraints for Parallel Multithreaded Workloads. - Juan M. Cebrian; Juan L. Aragón; Stefanos Kaxiras (IPDPS, 2011)

Leakage-efficient design of value predictors through state and non-state preserving techniques. - Juan M. Cebrian; Juan L. Aragón; José M. García 001; Stefanos Kaxiras (J. Supercomput., 2011)

A fault-tolerant architecture for parallel applications in tiled-CMPs. - Daniel Sánchez 004; Juan L. Aragón; José M. García 001 (J. Supercomput., 2012)

Efficient inter-core power and thermal balancing for multicore processors. - Juan M. Cebrian; Daniel Sánchez 004; Juan L. Aragón; Stefanos Kaxiras (Computing, 2013)

Modeling the impact of permanent faults in caches. - Daniel Sánchez 004; Yiannakis Sazeides; Juan M. Cebrian; José M. García 001; Juan L. Aragón (ACM Trans. Archit. Code Optim., 2013)

Managing power constraints in a single-core scenario through power tokens. - Juan M. Cebrian; Daniel Sánchez 004; Juan L. Aragón; Stefanos Kaxiras (J. Supercomput., 2014)

DeSC: decoupled supply-compute communication management for heterogeneous architectures. - Tae Jun Ham; Juan L. Aragón; Margaret Martonosi (MICRO, 2015)

GPU-Accelerated High-Speed Eye Pupil Tracking System. - Juan Mompean; Juan L. Aragón; Pedro Prieto; Pablo Artal (SBAC-PAD, 2015)

Soft-error mitigation by means of decoupled transactional memory threads. - Daniel Sánchez 004; Juan M. Cebrian; José M. García 001; Juan L. Aragón (Distributed Comput., 2015)

MASkIt: Soft error rate estimation for combinational circuits. - Martí Anglada; Ramon Canal; Juan L. Aragón; Antonio González 001 (ICCD, 2016)

Decoupling Data Supply from Computation for Latency-Tolerant Communication in Heterogeneous Architectures. - Tae Jun Ham; Juan L. Aragón; Margaret Martonosi (ACM Trans. Archit. Code Optim., 2017)

Design of an accurate and high-speed binocular pupil tracking system based on GPGPUs. - Juan Mompean; Juan L. Aragón; Pedro Prieto; Pablo Artal (J. Supercomput., 2018)

Early Visibility Resolution for Removing Ineffectual Computations in the Graphics Pipeline. - Martí Anglada; Enrique de Lucas; Joan-Manuel Parcerisa; Juan L. Aragón; Antonio González 001 (HPCA, 2019)

Rendering Elimination: Early Discard of Redundant Tiles in the Graphics Pipeline. - Martí Anglada; Enrique de Lucas; Joan-Manuel Parcerisa; Juan L. Aragón; Pedro Marcuello; Antonio González 001 (HPCA, 2019)

GPU-based processing of Hartmann-Shack images for accurate and high-speed ocular wavefront sensing. - Juan Mompean; Juan L. Aragón; Pedro Prieto; Pablo Artal (Future Gener. Comput. Syst., 2019)

Efficient Data Supply for Parallel Heterogeneous Architectures. - Tae Jun Ham; Juan L. Aragón; Margaret Martonosi (ACM Trans. Archit. Code Optim., 2019)

A Simulator and Compiler Framework for Agile Hardware-Software Co-design Evaluation and Exploration. - Tyler Sorensen 001; Aninda Manocha; Esin Tureci; Marcelo Orenes-Vera; Juan L. Aragón; Margaret Martonosi (ICCAD, 2020)

MosaicSim: A Lightweight, Modular Simulator for Heterogeneous Systems. - Opeoluwa Matthews; Aninda Manocha; Davide Giri; Marcelo Orenes-Vera; Esin Tureci; Tyler Sorensen 001; Tae Jun Ham; Juan L. Aragón; Luca P. Carloni; Margaret Martonosi (ISPASS, 2020)

The MosaicSim Simulator (Full Technical Report). - Opeoluwa Matthews; Aninda Manocha; Davide Giri; Marcelo Orenes-Vera; Esin Tureci; Tyler Sorensen 001; Tae Jun Ham; Juan L. Aragón; Luca P. Carloni; Margaret Martonosi (CoRR, 2020)

GraphAttack: Optimizing Data Supply for Graph Applications on In-Order Multicore Architectures. - Aninda Manocha; Tyler Sorensen 001; Esin Tureci; Opeoluwa Matthews; Juan L. Aragón; Margaret Martonosi (ACM Trans. Archit. Code Optim., 2021)

Fast and Accurate SER Estimation for Large Combinational Blocks in Early Stages of the Design. - Martí Anglada; Ramon Canal; Juan L. Aragón; Antonio González 001 (IEEE Trans. Sustain. Comput., 2021)

TCOR: A Tile Cache with Optimal Replacement. - Diya Joseph; Juan L. Aragón; Joan-Manuel Parcerisa; Antonio González 001 (HPCA, 2022)

The Implications of Page Size Management on Graph Analytics. - Aninda Manocha; Zi Yan; Esin Tureci; Juan L. Aragón; David W. Nellans; Margaret Martonosi (IISWC, 2022)

Tiny but mighty: designing and realizing scalable latency tolerance for manycore SoCs. - Marcelo Orenes-Vera; Aninda Manocha; Jonathan Balkind; Fei Gao 016; Juan L. Aragón; David Wentzlaff; Margaret Martonosi (ISCA, 2022)

MEGsim: A Novel Methodology for Efficient Simulation of Graphics Workloads in GPUs. - Jorge Ortiz; David Corbalán-Navarro; Juan L. Aragón; Antonio González 001 (ISPASS, 2022)

DTexL: Decoupled Raster Pipeline for Texture Locality. - Diya Joseph; Juan L. Aragón; Joan-Manuel Parcerisa; Antonio González 001 (MICRO, 2022)

DTM-NUCA: Dynamic Texture Mapping-NUCA for Energy-Efficient Graphics Rendering. - David Corbalán-Navarro; Juan L. Aragón; Joan-Manuel Parcerisa; Antonio González 001 (PDP, 2022)

Triangle Dropping: An Occluded-geometry Predictor for Energy-efficient Mobile GPUs. - David Corbalán-Navarro; Juan L. Aragón; Martí Anglada; Joan-Manuel Parcerisa; Antonio González 001 (ACM Trans. Archit. Code Optim., 2022)

Dynamic sampling rate: harnessing frame coherence in graphics applications for energy-efficient GPUs. - Martí Anglada; Enrique de Lucas; Joan-Manuel Parcerisa; Juan L. Aragón; Antonio González 001 (J. Supercomput., 2022)

Energy-efficient design of a presbyopia correction wearable powered by mobile GPUs and FPGAs. - Juan Mompean; Juan L. Aragón; Pablo Artal (J. Supercomput., 2022)

Omega-Test: A Predictive Early-Z Culling to Improve the Graphics Pipeline Energy-Efficiency. - David Corbalán-Navarro; Juan L. Aragón; Martí Anglada; Enrique de Lucas; Joan-Manuel Parcerisa; Antonio González 001 (IEEE Trans. Vis. Comput. Graph., 2022)

The Implications of Page Size Management on Graph Analytics. - Aninda Manocha; Zi Yan; Esin Tureci; Juan Luis Aragón; David W. Nellans; Margaret Martonosi (Zenodo, 2022)

Boustrophedonic Frames: Quasi-Optimal L2 Caching for Textures in GPUs. - Diya Joseph; Juan L. Aragón; Joan-Manuel Parcerisa; Antonio González 001 (PACT, 2023)

Architectural Support for Optimizing Huge Page Selection Within the OS. - Aninda Manocha; Zi Yan; Esin Tureci; Juan L. Aragón; David W. Nellans; Margaret Martonosi (MICRO, 2023)

Graphfire: Synergizing Fetch, Insertion, and Replacement Policies for Graph Analytics. - Aninda Manocha; Juan L. Aragón; Margaret Martonosi (IEEE Trans. Computers, 2023)

LIBRA: Memory Bandwidth- and Locality-Aware Parallel Tile Rendering. - Aurora Tomás; Juan L. Aragón; Joan-Manuel Parcerisa; Antonio González 001 (MICRO, 2024)

WaSP: Warp Scheduling to Mimic Prefetching in Graphics Workloads. - Diya Joseph; Juan Luis Aragón; Joan-Manuel Parcerisa; Antonio González 001 (CoRR, 2024)

VolRec: 4D real-time volumetric reconstruction of OCT data. - Arturo Vicente-Jaén; Juan Mompean; Juan L. Aragón; Pablo Artal (J. Supercomput., 2025)