Functional Partitioning for Hardware-Software Codesign using Genetic Algorithms. - José Ignacio Hidalgo; Juan Lanchares (EUROMICRO, 1997)

RSR: A New Rectilinear Steiner Minimum Tree Approximation for FPGA Placement and Global Routing. - Juan de Vicente; Juan Lanchares; Román Hermida (EUROMICRO, 1998)

Placement Optimization Based on Global Routing Updating for System Partitioning onto Multi-FPGA Mesh Topologies. - Juan de Vicente; Juan Lanchares; Román Hermida (FPL, 1999)

A Method for Model Parameter Identification Using Parallel Genetic Algorithms. - José Ignacio Hidalgo; Manuel Prieto 001; Juan Lanchares; Francisco Tirado; B. de Andrés; Segundo Esteban San Román; D. Rivera (PVM/MPI, 1999)

Partitioning and Placement for Multi-FPGA Systems Using Genetic Algorithms. - José Ignacio Hidalgo; Juan Lanchares; Román Hermida (EUROMICRO, 2000)

Adaptive FPGA Placement by Natural Optimization. - Juan de Vicente; Juan Lanchares; Román Hermida (IEEE International Workshop on Rapid System Prototyping, 2000)

A pseudo delay-insensitive timing model to synthesizing low-power asynchronous circuits. - Oscar Garnica; Juan Lanchares; Román Hermida (DATE, 2001)

Pipelined Genetic Architecture with Fitness on the Fly. - Aitor Ibarra; Juan Lanchares; José Ignacio Hidalgo; F. Saenz (DSD, 2001)

A Parallel Compact Genetic Algorithm for Multi-FPGA Partitioning. - Ranieri Baraglia; Raffaele Perego 001; José Ignacio Hidalgo; Juan Lanchares; Francisco Tirado (PDP, 2001)

FPGA Placement by Thermodynamic Combinatorial Optimization. - Juan de Vicente; Juan Lanchares; Román Hermida (DATE, 2002)

A Hybrid Evolutionary Algorithm for Multi-FPGA Systems Design. - José Ignacio Hidalgo; Juan Lanchares; Aitor Ibarra; Román Hermida (DSD, 2002)

Optimization of Equational Specifications Using Genetic Techniques. - Aitor Ibarra; José M. Mendías; Juan Lanchares; José Ignacio Hidalgo; Román Hermida (DSD, 2002)

Transformation of Equational Specification by Means of Genetic Programming. - Aitor Ibarra; Juan Lanchares; Jose Manuel Mendias; José Ignacio Hidalgo; Román Hermida (EuroGP, 2002)

A New Methodology to Design Low-Power Asynchronous Circuits. - Oscar Garnica; Juan Lanchares; Román Hermida (PATMOS, 2002)

Optimization of Asynchronous Delay-Insensitive Pipeline Latency Using Stage Reorganization and Optimal Stage Parameter Estimation. - Oscar Garnica; Juan Lanchares; Román Hermida (Fundam. Informaticae, 2002)

Multi-FPGA Systems Synthesis by Means of Evolutionary Computation. - José Ignacio Hidalgo; Francisco Fernández 001; Juan Lanchares; Juan Manuel Sánchez-Pérez; Román Hermida; Marco Tomassini; Ranieri Baraglia; Raffaele Perego 001; Oscar Garnica (GECCO, 2003)

Power-Consumption RRRRreduction in Asynchronous Circuits Using Delay Path Unequalization. - Sonia López; Oscar Garnica; José Ignacio Hidalgo; Juan Lanchares; Román Hermida (PATMOS, 2003)

Hybrid Parallelization of a Compact Genetic Algorithm. - José Ignacio Hidalgo; Manuel Prieto 001; Juan Lanchares; Ranieri Baraglia; Francisco Tirado; Oscar Garnica (PDP, 2003)

Empirical Characterization of the Latency of Long Asynchronous Pipelines with Data-Dependent Module Delays. - José Manuel Colmenar; Oscar Garnica; Sonia López; José Ignacio Hidalgo; Juan Lanchares; Román Hermida (PDP, 2004)

A methodology for reconfigurable hardware design based upon evolutionary computation. - Francisco Fernández 001; José Ignacio Hidalgo; Juan Lanchares; J. M. Sánchez (Microprocess. Microsystems, 2004)

Annealing placement by thermodynamic combinatorial optimization. - Juan de Vicente; Juan Lanchares; Román Hermida (ACM Trans. Design Autom. Electr. Syst., 2004)

Power Reduction of Superscalar Processor Functional Units by Resizing Adder-Width. - Guadalupe Miñana; Oscar Garnica; José Ignacio Hidalgo; Juan Lanchares; José Manuel Colmenar (PATMOS, 2005)

Comparing the Performance of a 64-bit Fully-Asynchronous Superscalar Processor versus its Synchronous Counterpart. - José Manuel Colmenar; Oscar Garnica; Juan Lanchares; José Ignacio Hidalgo; Guadalupe Miñana; Sonia López (DSD, 2006)

A Power-Aware Technique for Functional Units in High-Performance Processors. - Guadalupe Miñana; Oscar Garnica; José Ignacio Hidalgo; Juan Lanchares; José Manuel Colmenar (DSD, 2006)

Sim-async: An Architectural Simulator for Asynchronous Processor Modeling Using Distribution Functions. - José Manuel Colmenar; Oscar Garnica; Juan Lanchares; José Ignacio Hidalgo; Guadalupe Miñana; Sonia López (Euro-Par, 2006)

A Technique to Reduce Static and Dynamic Power of Functional Units in High-Performance Processors. - Guadalupe Miñana; José Ignacio Hidalgo; Oscar Garnica; Juan Lanchares; José Manuel Colmenar; Sonia López (PATMOS, 2006)

Rate-Driven Control of Resizable Caches for Highly Threaded SMT Processors. - Sonia López; Steven G. Dropsho; David H. Albonesi; Oscar Garnica; Juan Lanchares (PACT, 2007)

Is the island model fault tolerant? - José Ignacio Hidalgo; Francisco Fernández de Vega; Juan Lanchares; Daniel Lombraña Gonzalez (GECCO, 2007)

Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches. - Sonia López; Steve Dropsho; David H. Albonesi; Oscar Garnica; Juan Lanchares (HiPEAC, 2007)

Optimization of dynamic data structures in multimedia embedded systems using evolutionary computation. - David Atienza; Christos Baloukas; Lazaros Papadopoulos; Christophe Poucet; Stylianos Mamagkakis; José Ignacio Hidalgo; Francky Catthoor; Dimitrios Soudris; Juan Lanchares (SCOPES, 2007)

Reducing power of functional units in high-performance processors by checking instruction codes and resizing adders. - Guadalupe Miñana; José Ignacio Hidalgo; Juan Lanchares; José Manuel Colmenar; Oscar Garnica; Sonia López (IET Comput. Digit. Tech., 2007)

Design Flow of Dynamically-Allocated Data Types in Embedded Applications Based on Elitist Evolutionary Computation Optimization. - José Luis Risco-Martín; David Atienza; José Ignacio Hidalgo; Juan Lanchares (DSD, 2008)

Analysis of multi-objective evolutionary algorithms to optimize dynamic data types in embedded systems. - José Ignacio Hidalgo; José L. Risco-Martín; David Atienza; Juan Lanchares (GECCO, 2008)

Solving discrete deceptive problems with EMMRS. - José L. Risco-Martín; José Ignacio Hidalgo; Juan Lanchares; Oscar Garnica (GECCO, 2008)

Optimization of dynamic data types in embedded systems using DEVS/SOA-based modeling and simulation. - José L. Risco-Martín; Saurabh Mittal; David Atienza; José Ignacio Hidalgo; Juan Lanchares (Infoscale, 2008)

Modelling Asynchronous Systems using Probability Distribution Functions. - José Manuel Colmenar; Noelia Morón; Oscar Garnica; Juan Lanchares; José Ignacio Hidalgo (PDP, 2008)

Particle swarm optimisation of memory usage in embedded systems. - José L. Risco-Martín; Oscar Garnica; Juan Lanchares; José Ignacio Hidalgo; David Atienza (Int. J. High Perform. Syst. Archit., 2008)

A parallel evolutionary algorithm to optimize dynamic data types in embedded systems. - José L. Risco-Martín; David Atienza; José Ignacio Hidalgo; Juan Lanchares (Soft Comput., 2008)

Mixed heuristic and mathematical programming using reference points for dynamic data types optimization in multimedia embedded systems. - José Luis Risco-Martín; José Ignacio Hidalgo; David Atienza; Juan Lanchares; Oscar Garnica (GECCO, 2009)

Optimization methodology of dynamic data structures based on genetic algorithms for multimedia embedded systems. - Christos Baloukas; José Luis Risco-Martín; David Atienza; Christophe Poucet; Lazaros Papadopoulos; Stylianos Mamagkakis; Dimitrios Soudris; José Ignacio Hidalgo; Francky Catthoor; Juan Lanchares (J. Syst. Softw., 2009)

Characterizing asynchronous variable latencies through probability distribution functions. - José Manuel Colmenar; Oscar Garnica; Juan Lanchares; José Ignacio Hidalgo (Microprocess. Microsystems, 2009)

Adaptive Cache Memories for SMT Processors. - Sonia López; Oscar Garnica; David H. Albonesi; Steven G. Dropsho; Juan Lanchares; José Ignacio Hidalgo (DSD, 2010)

Improving reliability of embedded systems through dynamic memory manager optimization using grammatical evolution. - José Manuel Colmenar; José L. Risco-Martín; David Atienza; Oscar Garnica; José Ignacio Hidalgo; Juan Lanchares (GECCO, 2010)

Simulating a LAGS processor to consider variable latency on L1 D-Cache. - J. Manuel Colmenar; Oscar Garnica; Juan Lanchares; José Ignacio Hidalgo (SummerSim, 2010)

Parallel Architectures and Bioinspired Algorithms. - José Ignacio Hidalgo; Francisco Fernández 001; Juan Lanchares; Erick Cantú-Paz; Albert Y. Zomaya (Parallel Comput., 2010)

Parallel and Distributed Optimization of Dynamic Data Structures for Multimedia Embedded Systems. - José L. Risco-Martín; David Atienza; José Ignacio Hidalgo; Juan Lanchares (Parallel and Distributed Computational Intelligence, 2010)

A phase adaptive cache hierarchy for SMT processors. - Sonia López; Oscar Garnica; David H. Albonesi; Steven G. Dropsho; Juan Lanchares; José Ignacio Hidalgo (Microprocess. Microsystems, 2011)

Special issue on evolutionary computation on general purpose graphics processing units. - José L. Risco-Martín; Juan Lanchares; Carlos A. Coello Coello (Soft Comput., 2012)

Introduction. - Francisco Fernández de Vega; José Ignacio Hidalgo; Juan Lanchares (Parallel Architectures and Bioinspired Algorithms, 2012)

A review of bioinspired computer-aided design tools for hardware design. - Juan Lanchares; Oscar Garnica; Francisco Fernández de Vega; José Ignacio Hidalgo (Concurr. Comput. Pract. Exp., 2013)

Clarke and parkes error grid analysis of diabetic glucose models obtained with evolutionary computation. - José Ignacio Hidalgo; J. Manuel Colmenar; José Luis Risco-Martín; Esther Maqueda; Marta Botella; José Antonio Rubio; Alfredo Cuesta-Infante; Oscar Garnica; Juan Lanchares (GECCO (Companion), 2014)

Solving GA-hard problems with EMMRS and GPGPUs. - José Ignacio Hidalgo; J. Manuel Colmenar; José Luis Risco-Martín; Carlos Sánchez-Lacruz; Juan Lanchares; Oscar Garnica; Josefa Díaz (GECCO, 2014)

A methodology to automatically optimize dynamic memory managers applying grammatical evolution. - José L. Risco-Martín; J. Manuel Colmenar; José Ignacio Hidalgo; Juan Lanchares; Josefa Díaz (J. Syst. Softw., 2014)

Optimizing Performance of L1 Cache Memory for Embedded Systems driven by Differential Evolution. - Josefa Díaz Álvarez; J. Manuel Colmenar; José L. Risco-Martín; Juan Lanchares; Oscar Garnica (GECCO (Companion), 2015)

Data-Based Identification of Prediction Models for Glucose. - J. Manuel Velasco; Stephan M. Winkler; José Ignacio Hidalgo; Oscar Garnica; Juan Lanchares; J. Manuel Colmenar; Esther Maqueda; Marta Botella; José Antonio Rubio (GECCO (Companion), 2015)

Compilable Phenotypes: Speeding-Up the Evaluation of Glucose Models in Grammatical Evolution. - J. Manuel Colmenar; José Ignacio Hidalgo; Juan Lanchares; Oscar Garnica; José L. Risco-Martín; Iván Contreras; Almudena Sánchez; J. Manuel Velasco (EvoApplications (2), 2016)

Optimizing L1 cache for embedded systems through grammatical evolution. - Josefa Díaz Álvarez; J. Manuel Colmenar; José L. Risco-Martín; Juan Lanchares; Oscar Garnica (Soft Comput., 2016)

Data augmentation and evolutionary algorithms to improve the prediction of blood glucose levels in scarcity of training data. - José Manuel Velasco; Oscar Garnica; Sergio Contador; Juan Lanchares; Esther Maqueda; Marta Botella; José Ignacio Hidalgo (CEC, 2017)

Enhancing Grammatical Evolution Through Data Augmentation: Application to Blood Glucose Forecasting. - José Manuel Velasco; Oscar Garnica; Sergio Contador; José Manuel Colmenar; Esther Maqueda; Marta Botella; Juan Lanchares; José Ignacio Hidalgo (EvoApplications (1), 2017)

Forecasting glucose levels in patients with diabetes mellitus using semantic grammatical evolution and symbolic aggregate approximation. - José Manuel Velasco; Oscar Garnica; Sergio Contador; Marta Botella; Juan Lanchares; José Ignacio Hidalgo (GECCO (Companion), 2017)

Data Based Prediction of Blood Glucose Concentrations Using Evolutionary Methods. - José Ignacio Hidalgo; J. Manuel Colmenar; Gabriel Kronberger; Stephan M. Winkler; Oscar Garnica; Juan Lanchares (J. Medical Syst., 2017)

Identification of Models for Glucose Blood Values in Diabetics by Grammatical Evolution. - José Ignacio Hidalgo; J. Manuel Colmenar; J. Manuel Velasco; Gabriel Kronberger; Stephan M. Winkler; Oscar Garnica; Juan Lanchares (Handbook of Grammatical Evolution, 2018)

Combining data augmentation, EDAs and grammatical evolution for blood glucose forecasting. - José Manuel Velasco; Oscar Garnica; Juan Lanchares; Marta Botella; José Ignacio Hidalgo (Memetic Comput., 2018)

Can clustering improve glucose forecasting with genetic programming models? - Sergio Contador; José Ignacio Hidalgo; Oscar Garnica; J. Manuel Velasco; Juan Lanchares (GECCO (Companion), 2019)

Determination of microscopic residual stresses using evolutionary algorithms. - José Ignacio Hidalgo; Ricardo Fernández; J. Manuel Colmenar; Oscar Garnica; Juan Lanchares; Gaspar González-Doncel (GECCO (Companion), 2019)

Determination of microscopic residual stresses using diffraction methods, EBSD maps, and evolutionary algorithms. - José Ignacio Hidalgo; Ricardo Fernández; Oscar Garnica; J. Manuel Colmenar; Juan Lanchares; Gaspar González-Doncel (GECCO (Companion), 2019)

Glucose forecasting combining Markov chain based enrichment of data, random grammatical evolution and Bagging. - José Ignacio Hidalgo; Marta Botella; J. Manuel Velasco; Oscar Garnica; Carlos Cervigón; Remedios Martínez; Aranzazu Aramendi; Esther Maqueda; Juan Lanchares (Appl. Soft Comput., 2020)

Noise spectral analysis and error estimation of continuous glucose monitors under real-life conditions of diabetes patients. - Oscar Garnica; Juan Lanchares; J. Manuel Velasco; José Ignacio Hidalgo; Marta Botella (Biomed. Signal Process. Control., 2020)

Optimal Runtime Algorithm to Improve Fault Tolerance of Bus-Based Reconfigurable Designs. - Oscar Garnica; Juan Lanchares; José Ignacio Hidalgo (IEEE Trans. Very Large Scale Integr. Syst., 2020)

A Critical Review of the state-of-the-art on Deep Neural Networks for Blood Glucose Prediction in Patients with Diabetes. - Felix Tena; Oscar Garnica; Juan Lanchares; José Ignacio Hidalgo (CoRR, 2021)

Ensemble Models of Cutting-Edge Deep Neural Networks for Blood Glucose Prediction in Patients with Diabetes. - Felix Tena; Oscar Garnica; Juan Lanchares; José Ignacio Hidalgo (Sensors, 2021)

Hardware design of a model generator based on grammars and cartesian genetic programming for blood glucose prediction. - Jorge Cano; José Ignacio Hidalgo; Oscar Garnica; Juan Lanchares (GECCO Companion, 2023)

Real Time Evolvable Hardware for Optimal Reconfiguration of Cusp-Like Pulse Shapers. - Juan Lanchares; Oscar Garnica; José L. Risco-Martín; José Ignacio Hidalgo; J. Manuel Colmenar; Alfredo Cuesta-Infante (CoRR, 2024)

Reverse-Engineering Optimization Techniques of High-Level Synthesis: Practical Insights Into Accelerating Applications With AMD-Xilinx Vitis. - Jorge Koronis; Oscar Garnica; J. Ignacio Hidalgo; Juan Lanchares (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

An LSTM-Based Neural Network Wearable System for Blood Glucose Prediction in People With Diabetes. - Felix Tena; Oscar Garnica; Juan Lanchares; J. Ignacio Hidalgo (IEEE J. Biomed. Health Informatics, 2025)