Variable latency VLSI design based on timing analysis, delay ATPG, and completion prediction. - Bao Liu 001; Lu Wang; Juan Portillo (MWSCAS, 2013)

Building trust in 3PIP using asset-based security property verification. - Juan Portillo; Eugene John; Seetharam Narasimhan (VTS, 2016)

Using Static Hardware Wrappers to Thwart Hardware Trojans and Code Bugs at Runtime. - Juan Portillo; Eugene John (MWSCAS, 2018)