Loop-Carried Dependence Verification in OpenMP. - Juan Salamanca 001; Luis Mattos; Guido Araujo (IWOMP, 2014)

Using Hardware Transactional Memory to Enable Speculative Trace Optimization. - Juan Salamanca 001; José Nelson Amaral; Guido Araujo (SBAC-PAD (Workshops), 2015)

Evaluating and Improving Thread-Level Speculation in Hardware Transactional Memories. - Juan Salamanca 001; José Nelson Amaral; Guido Araujo (IPDPS, 2016)

Performance Evaluation of Thread-Level Speculation in Off-the-Shelf Hardware Transactional Memories. - Juan Salamanca 001; José Nelson Amaral; Guido Araujo (Euro-Par, 2017)

DOACROSS Parallelization Based on Component Annotation and Loop-Carried Probability. - Luis Mattos; Divino Cesar S. Lucas; Juan Salamanca 001; Joao P. L. de Carvalho; Márcio Machado Pereira; Guido Araujo (SBAC-PAD, 2018)

Using Hardware-Transactional-Memory Support to Implement Thread-Level Speculation. - Juan Salamanca 001; José Nelson Amaral; Guido Araujo (IEEE Trans. Parallel Distributed Syst., 2018)

A Proposal for Supporting Speculation in the OpenMP taskloop Construct. - Juan Salamanca 001; Alexandro Baldassin (IWOMP, 2019)

Using Hardware Transactional Memory to Implement Speculative Privatization in OpenMP. - Juan Salamanca 001; Alexandro Baldassin (LCPC, 2020)

Improving Speculative taskloop in Hardware Transactional Memory. - Juan Salamanca 001; Alexandro Baldassin (IWOMP, 2021)

Performance Comparison of Speculative Taskloop and OpenMP-for-Loop Thread-Level Speculation on Hardware Transactional Memory. - Juan Salamanca 001 (ISPDC, 2022)

Using Off-the-Shelf Hardware Transactional Memory to Implement Speculative While in OpenMP. - Juan Salamanca 001; Alexandro Baldassin (IWOMP, 2022)

How to Efficiently Parallelize Irregular DOACROSS Loops Using Fine Granularity and OpenMP Tasks: The SPEC mcf Case. - Juan Salamanca 001; Alexandro Baldassin (IWOMP, 2023)

Evaluating the Performance of Speculative DOACROSS Loop Parallelization with taskloop. - Juan Salamanca 001; Alexandro Baldassin (CoRR, 2023)

Using hardware-transactional-memory support to implement speculative task execution. - Juan Salamanca 001; Alexandro Baldassin (J. Parallel Distributed Comput., 2024)