A1CSA: An energy-efficient fast adder architecture for cell-based VLSI design. - Jucemar Monteiro; José Luís Güntzel; Luciano Volcan Agostini (ICECS, 2011)

An analytical timing-driven algorithm for detailed placement. - Jucemar Monteiro; Guilherme Flach; Marcelo O. Johann; José Luís Almada Güntzel (LASCAS, 2015)

An Incremental Timing-Driven flow using quadratic formulation for detailed placement. - Guilherme Flach; Jucemar Monteiro; Mateus Fogaça; Julia Casarin Puget; Paulo F. Butzen; Marcelo O. Johann; Ricardo Augusto da Luz Reis (VLSI-SoC, 2015)

Quadratic timing objectives for incremental timing-driven placement optimization. - Mateus Fogaça; Guilherme Flach; Jucemar Monteiro; Marcelo O. Johann; Ricardo Reis 001 (ICECS, 2016)

Drive Strength Aware Cell Movement Techniques for Timing Driven Placement. - Guilherme Flach; Mateus Fogaça; Jucemar Monteiro; Marcelo O. Johann; Ricardo Augusto da Luz Reis (ISPD, 2016)

Routing-Aware Incremental Timing-Driven Placement. - Jucemar Monteiro; Nima Karimpour Darav; Guilherme Flach; Mateus Fogaça; Ricardo Augusto da Luz Reis; Andrew A. Kennings; Marcelo O. Johann; Laleh Behjat (ISVLSI, 2016)

Rsyn: An Extensible Physical Synthesis Framework. - Guilherme Flach; Mateus Fogaça; Jucemar Monteiro; Marcelo O. Johann; Ricardo Augusto da Luz Reis (ISPD, 2017)

An Optimized Cost Flow Algorithm to Spread Cells in Detailed Placement. - Jucemar Monteiro; Marcelo O. Johann; Laleh Behjat (ACM Trans. Design Autom. Electr. Syst., 2019)