Reducing Conflicts in Direct-Mapped Caches with a Temporality-Based Design. - Jude A. Rivers; Edward S. Davidson (ICPP, Vol. 1, 1996)

Performance Issues in Integrating Temporality-Based Caching with Prefetching. - Jude A. Rivers; Edward S. Davidson (Perform. Evaluation, 1996)

On Effective Data Supply For Multi-Issue Processors. - Jude A. Rivers; Edward S. Tam; Edward S. Davidson (ICCD, 1997)

On High-Bandwidth Data Cache Design for Multi-Issue Processors. - Jude A. Rivers; Gary S. Tyson; Edward S. Davidson; Todd M. Austin (MICRO, 1997)

Evaluating the performance of active cache management schemes. - Edward S. Tam; Jude A. Rivers; Vijayalakshmi Srinivasan; Gary S. Tyson; Edward S. Davidson (ICCD, 1998)

Utilizing Reuse Information in Data Cache Management. - Jude A. Rivers; Edward S. Tam; Gary S. Tyson; Edward S. Davidson; Matthew K. Farrens (International Conference on Supercomputing, 1998)

mlcache: A Flexible Multi-Lateral Cache Simulator. - Edward S. Tam; Jude A. Rivers; Gary S. Tyson; Edward S. Davidson (MASCOTS, 1998)

Performance aspects of high-bandwidth multi-lateral cache organizations. - Jude A. Rivers (1998)

Active Management of Data Caches by Exploiting Reuse Information. - Edward S. Tam; Jude A. Rivers; Vijayalakshmi Srinivasan; Gary S. Tyson; Edward S. Davidson (IEEE Trans. Computers, 1999)

Reducing instruction fetch energy with backwards branch control information and buffering. - Jude A. Rivers; Sameh W. Asaad; John-David Wellman; Jaime H. Moreno (ISLPED, 2003)

The Impact of Technology Scaling on Lifetime Reliability. - Jayanth Srinivasan; Sarita V. Adve; Pradip Bose; Jude A. Rivers (DSN, 2004)

The Case for Lifetime Reliability-Aware Microprocessors. - Jayanth Srinivasan; Sarita V. Adve; Pradip Bose; Jude A. Rivers (ISCA, 2004)

SoftArch: An Architecture Level Tool for Modeling and Analyzing Soft Errors. - Xiaodong Li; Sarita V. Adve; Pradip Bose; Jude A. Rivers (DSN, 2005)

Exploiting Structural Duplication for Lifetime Reliability Enhancement. - Jayanth Srinivasan; Sarita V. Adve; Pradip Bose; Jude A. Rivers (ISCA, 2005)

Lifetime Reliability: Toward an Architectural Solution. - Jayanth Srinivasan; Sarita V. Adve; Pradip Bose; Jude A. Rivers (IEEE Micro, 2005)

Architecture-Level Soft Error Analysis: Examining the Limits of Common Assumptions. - Xiaodong Li; Sarita V. Adve; Pradip Bose; Jude A. Rivers (DSN, 2007)

A Framework for Architecture-Level Lifetime Reliability Modeling. - Jeonghee Shin; Victor V. Zyuban; Zhigang Hu; Jude A. Rivers; Pradip Bose (DSN, 2007)

Online Estimation of Architectural Vulnerability Factor for Soft Errors. - Xiaodong Li; Sarita V. Adve; Pradip Bose; Jude A. Rivers (ISCA, 2008)

Metrics for Architecture-Level Lifetime Reliability Analysis. - Pradeep Ramachandran; Sarita V. Adve; Pradip Bose; Jude A. Rivers (ISPASS, 2008)

Phaser: Phased methodology for modeling the system-level effects of soft errors. - Jude A. Rivers; Pradip Bose; Prabhakar Kudva; John-David Wellman; Pia N. Sanda; Ethan H. Cannon; Luiz C. Alves (IBM J. Res. Dev., 2008)

Scalable high performance main memory system using phase-change memory technology. - Moinuddin K. Qureshi; Vijayalakshmi Srinivasan; Jude A. Rivers (ISCA, 2009)

Tribeca: design for PVT variations with local recovery and fine-grained adaptation. - Meeta Sharma Gupta; Jude A. Rivers; Pradip Bose; Gu-Yeon Wei; David M. Brooks (MICRO, 2009)

Reliability Challenges and System Performance at the Architecture Level. - Jude A. Rivers; Prabhakar Kudva (IEEE Des. Test Comput., 2009)

Power-efficient, reliable microprocessor architectures: modeling and design methods. - Pradip Bose; Alper Buyuktosunoglu; Chen-Yong Cher; John A. Darringer; Meeta Sharma Gupta; Hendrik F. Hamann; Hans M. Jacobson; Prabhakar Kudva; Eren Kursun; Niti Madan; Indira Nair; Jude A. Rivers; et al. (ACM Great Lakes Symposium on VLSI, 2010)

SAFER: Stuck-At-Fault Error Recovery for Memories. - Nak Hee Seong; Dong Hyuk Woo; Vijayalakshmi Srinivasan; Jude A. Rivers; Hsien-Hsin S. Lee (MICRO, 2010)

Exploring the vulnerability of CMPs to soft errors with 3D stacked non-volatile memory. - Guangyu Sun 003; Eren Kursun; Jude A. Rivers; Yuan Xie 001 (ICCD, 2011)

Error Tolerance in Server Class Processors. - Jude A. Rivers; Meeta Sharma Gupta; Jeonghee Shin; Prabhakar Kudva; Pradip Bose (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Power management of multi-core chips: Challenges and pitfalls. - Pradip Bose; Alper Buyuktosunoglu; John A. Darringer; Meeta Sharma Gupta; Michael B. Healy; Hans M. Jacobson; Indira Nair; Jude A. Rivers; Jeonghee Shin; Augusto Vega; Alan J. Weger (DATE, 2012)

Exploring the vulnerability of CMPs to soft errors with 3D stacked nonvolatile memory. - Guangyu Sun 003; Eren Kursun; Jude A. Rivers; Yuan Xie 001 (ACM J. Emerg. Technol. Comput. Syst., 2013)

SDCTune: A model for predicting the SDC proneness of an application for configurable protection. - Qining Lu; Karthik Pattabiraman; Meeta Sharma Gupta; Jude A. Rivers (CASES, 2014)

Configurable Detection of SDC-causing Errors in Programs. - Qining Lu; Guanpeng Li; Karthik Pattabiraman; Meeta Sharma Gupta; Jude A. Rivers (ACM Trans. Embed. Comput. Syst., 2017)