Middle-of-the-Line Reliability Characterization of Recessed-Diffusion-Contact Adopted sub-5nm Logic Technology. - Seongkyung Kim; Ukjin Jung; Seungjin Choo; Kihyun Choi; Tae-Jin Chung; Shin-Young Chung; Euncheol Lee; Juhun Park; Deokhan Bae; Myungyoon Um (IRPS, 2022)

Highly manufacturable Self-Aigned Direct Backside Contact (SA-DBC) and Backside Gate Contact (BGC) for 3-dimensional Stacked FET at 48nm gate pitch. - Jaehyun Park; Juhun Park; Kyuman Hwang; Jinchan Yun; Dahye Kim; Sungil Park; Jejune Park; Jinwook Yang; Jae Won Jeong; Chuljin Yun; Jinho Bae; Sam Park; et al. (VLSI Technology and Circuits, 2024)