A symbolic simulation approach in resolving signals' correlation. - Julien Dunoyer; Nizar Abdallah; Pirouz Bazargan-Sabet (Annual Simulation Symposium, 1996)

A technique for minimizing power during FPGA placement. - Kristofer Vorwerk; Madhu Raman; Julien Dunoyer; Yaun-Chung Hsu; Arun Kundu; Andrew A. Kennings (FPL, 2008)

Power minimisation during field programmable gate array placement. - Kristofer Vorwerk; Andrew A. Kennings; Val Pevzner; Arun Kundu; Madhu Raman; Julien Dunoyer; Yaun-shung Hsu (IET Comput. Digit. Tech., 2010)

An Artificial Intelligence Approach to EDA Software Testing: Application to Net Delay Algorithms in FPGAs. - Madhu Raman; Nizar Abdallah; Julien Dunoyer (ISQED, 2019)