Constrained Symbolic Simulation with Mathematica and ACL2. - Ghiath Al Sammane; Diana Toma; Julien Schmaltz; Pierre Ostier; Dominique Borrione (CHARME, 2003)

A Functional Approach to the Formal Specification of Networks on Chip. - Julien Schmaltz; Dominique Borrione (FMCAD, 2004)

TheoSim: combining symbolic simulation and theorem proving for hardware verification. - Ghiath Al Sammane; Julien Schmaltz; Diana Toma; Pierre Ostier; Dominique Borrione (SBCCI, 2004)

A Generic Network on Chip Model. - Julien Schmaltz; Dominique Borrione (TPHOLs, 2005)

Towards a formal theory of on chip communications in the ACL2 logic. - Julien Schmaltz; Dominique Borrione (ACL2, 2006)

Formalizing On Chip Communications in a Functional Style. - Julien Schmaltz; Dominique Borrione (Trustworthy Software, 2006)

A Formal Model of Lower System Layers. - Julien Schmaltz (FMCAD, 2006)

A Formal Model of Clock Domain Crossing and Automated Verification of Time-Triggered Hardware. - Julien Schmaltz (FMCAD, 2007)

A Generic Model for Formally Verifying NoC Communication Architectures: A Case Study. - Dominique Borrione; Amr Helmy; Laurence V. Pierre; Julien Schmaltz (NOCS, 2007)

On Conformance Testing for Timed Systems. - Julien Schmaltz; Jan Tretmans (FORMATS, 2008)

Executable formal specification and validation of NoC communication infrastructures. - Dominique Borrione; Amr Helmy; Laurence Pierre; Julien Schmaltz (SBCCI, 2008)

A functional formalization of on chip communications. - Julien Schmaltz; Dominique Borrione (Formal Aspects Comput., 2008)

Towards a formally verified network-on-chip. - Tom van den Broek; Julien Schmaltz (FMCAD, 2009)

Model-Based Testing of Electronic Passports. - Wojciech Mostowski; Erik Poll; Julien Schmaltz; Jan Tretmans; Ronny Wichers Schreur (FMICS, 2009)

A Formal Approach to the Verification of Networks on Chip. - Dominique Borrione; Amr Helmy; Laurence Pierre; Julien Schmaltz (EURASIP J. Embed. Syst., 2009)

Formal specification of networks-on-chips: deadlock and evacuation. - Freek Verbeek; Julien Schmaltz (DATE, 2010)

A Conformance Testing Relation for Symbolic Timed Automata. - Sabrina von Styp; Henrik C. Bohnenkamp; Julien Schmaltz (FORMATS, 2010)

Inference and Abstraction of the Biometric Passport. - Fides Aarts; Julien Schmaltz; Frits W. Vaandrager (ISoLA (1), 2010)

A Formal Proof of a Necessary and Sufficient Condition for Deadlock-Free Adaptive Networks. - Freek Verbeek; Julien Schmaltz (ITP, 2010)

The axiomatization of override and update. - Jasper Berendsen; David N. Jansen; Julien Schmaltz; Frits W. Vaandrager (J. Appl. Log., 2010)

Hunting deadlocks efficiently in microarchitectural models of communication fabrics. - Freek Verbeek; Julien Schmaltz (FMCAD, 2011)

An Experience Report on an Industrial Case-Study about Timed Model-Based Testing with UPPAAL-TRON. - Carsten Rütz; Julien Schmaltz (ICST Workshops, 2011)

Automatic verification for deadlock in networks-on-chips with adaptive routing and wormhole switching. - Freek Verbeek; Julien Schmaltz (NOCS, 2011)

A Fast and Verified Algorithm for Proving Store-and-Forward Networks Deadlock-Free. - Freek Verbeek; Julien Schmaltz (PDP, 2011)

Formal verification of a time-triggered hardware interface - Julien Schmaltz (CoRR, 2011)

Formal verification of a deadlock detection algorithm - Freek Verbeek; Julien Schmaltz (ACL2, 2011)

A Comment on "A Necessary and Sufficient Condition for Deadlock-Free Adaptive Routing in Wormhole Networks". - Freek Verbeek; Julien Schmaltz (IEEE Trans. Parallel Distributed Syst., 2011)

On Necessary and Sufficient Conditions for Deadlock-Free Routing in Wormhole Networks. - Freek Verbeek; Julien Schmaltz (IEEE Trans. Parallel Distributed Syst., 2011)

Automatic generation of deadlock detection algorithms for a family of microarchitecture description languages of communication fabrics. - Freek Verbeek; Julien Schmaltz (HLDVT, 2012)

A formally verified deadlock-free routing function in a fault-tolerant NoC architecture. - Abdulaziz Alhussien; Nader Bagherzadeh; Freek Verbeek; Bernard van Gastel; Julien Schmaltz (SBCCI, 2012)

Proof Pearl: A Formal Proof of Dally and Seitz' Necessary and Sufficient Condition for Deadlock-Free Routing in Interconnection Networks. - Freek Verbeek; Julien Schmaltz (J. Autom. Reason., 2012)

Analysis of a clock synchronization protocol for wireless sensor networks. - Faranak Heidarian; Julien Schmaltz; Frits W. Vaandrager (Theor. Comput. Sci., 2012)

Easy Formal Specification and Validation of Unbounded Networks-on-Chips Architectures. - Freek Verbeek; Julien Schmaltz (ACM Trans. Design Autom. Electr. Syst., 2012)

Towards the formal verification of cache coherency at the architectural level. - Freek Verbeek; Julien Schmaltz (ACM Trans. Design Autom. Electr. Syst., 2012)

Formal Deadlock Verification for Click Circuits. - Freek Verbeek; Sebastiaan J. C. Joosten; Julien Schmaltz (ASYNC, 2013)

Generation of inductive invariants from register transfer level designs of communication fabrics. - Sebastiaan J. C. Joosten; Julien Schmaltz (MEMOCODE, 2013)

Verification of Building Blocks for Asynchronous Circuits - Freek Verbeek; Julien Schmaltz (ACL2, 2013)

A formalisation of XMAS - Bernard van Gastel; Julien Schmaltz (ACL2, 2013)

A Macro for Reusing Abstract Functions and Theorems - Sebastiaan J. C. Joosten; Bernard van Gastel; Julien Schmaltz (ACL2, 2013)

Scalable liveness verification for communication fabrics. - Sebastiaan J. C. Joosten; Julien Schmaltz (DATE, 2014)

On Two Models of Noninterference: Rushby and Greve, Wilding, and Vanfleet. - Adrian Garcia Ramirez; Julien Schmaltz; Freek Verbeek; Bruno Langenstein; Holger Blasum (SAFECOMP, 2014)

Inference of channel types in micro-architectural models of on-chip communication networks. - Bernard van Gastel; Freek Verbeek; Julien Schmaltz (VLSI-SoC, 2014)

Formal Specification of a Generic Separation Kernel. - Freek Verbeek; Sergey Tverdyshev; Oto Havle; Holger Blasum; Bruno Langenstein; Werner Stephan 001; Yakoub Nemouchi; Abderrahmane Feliachi; Burkhart Wolff; Julien Schmaltz (Arch. Formal Proofs, 2014)

A Decision Procedure for Deadlock-Free Routing in Wormhole Networks. - Freek Verbeek; Julien Schmaltz (IEEE Trans. Parallel Distributed Syst., 2014)

Automatic extraction of micro-architectural models of communication fabrics from register transfer level designs. - Sebastiaan J. C. Joosten; Julien Schmaltz (DATE, 2015)

Formal Methods for MILS: Formalisations of the GWV Firewall. - Ruud Koolen; Julien Schmaltz (MILS@HiPEAC, 2015)

Process algebra semantics & reachability analysis for micro-architectural models of communication fabrics. - Sanne Wouda; Sebastiaan J. C. Joosten; Julien Schmaltz (MEMOCODE, 2015)

Formal API Specification of the PikeOS Separation Kernel. - Freek Verbeek; Oto Havle; Julien Schmaltz; Sergey Tverdyshev; Holger Blasum; Bruno Langenstein; Werner Stephan 001; Burkhart Wolff; Yakoub Nemouchi (NFM, 2015)

Modeling Information Routing with Noninterference. - Ruud Koolen; Julien Schmaltz (MILS@HiPEAC, 2016)

Formal micro-architectural analysis of on-chip ring networks. - Perry van Wesel; Julien Schmaltz (DAC, 2018)

Automatic generation of hardware checkers from formal micro-architectural specifications. - Alexander Fedotov; Julien Schmaltz (DATE, 2018)

Effective System Level Liveness Verification. - Alexander Fedotov; Jeroen J. A. Keiren; Julien Schmaltz (FMCAD, 2020)

Logic Gates, Circuits, Processors, Compilers and Computers - Jan Friso Groote; Rolf Morel; Julien Schmaltz; Adam Watkins (Springer, 2021)