A 1-to-4b 16.8-POPS/W 473-TOPS/mm2 6T-based In-Memory Computing SRAM in 22nm FD-SOI with Multi-Bit Analog Batch-Normalization. - Adrian Kneip; Martin Lefebvre 002; Julien Verecken; David Bol (ESSCIRC, 2022)

IMPACT: A 1-to-4b 813-TOPS/W 22-nm FD-SOI Compute-in-Memory CNN Accelerator Featuring a 4.2-POPS/W 146-TOPS/mm2 CIM-SRAM With Multi-Bit Analog Batch-Normalization. - Adrian Kneip; Martin Lefebvre 002; Julien Verecken; David Bol (IEEE J. Solid State Circuits, 2023)