Development of a High Speed Vision System for Mobile Robots. - Atsushi Konno; Ryo Uchikura; Toshiyuki Ishihara; Teppei Tsujita; Takeaki Sugimura; Jun Deguchi; Mitsumasa Koyanagi; Masaru Uchiyama (IROS, 2006)

Measurement of neuromagnetic fields accompanying movements by patient with acute stroke. - Kentaro Kotani; Shigeaki Esaka; Makoto Yamada; Jun Deguchi; Ken Horii; Mitsuo Tonoike; Taro Noguchi (Syst. Comput. Jpn., 2006)

A 0.6V 380µW -14dBm LO-input 2.4GHz double-balanced current-reusing single-gate CMOS mixer with cyclic passive combiner. - Jun Deguchi; Daisuke Miyashita; Mototsugu Hamada (ISSCC, 2009)

A fully integrated 2×1 dual-band direct-conversion transceiver with dual-mode fractional divider and noise-shaping TIA for mobile WiMAX SoC in 65nm CMOS. - Jun Deguchi; Daisuke Miyashita; Yosuke Ogasawara; Gaku Takemura; Masaomi Iwanaga; Kenichi Sami; Rui Ito; Junji Wadatsumi; Yuki Tsuda; Shoko Oda; Shunji Kawaguchi; Nobuyuki Itoh; et al. (ISSCC, 2010)

A Fully Integrated 2 ˟ 1 Dual-Band Direct-Conversion Mobile WiMAX Transceiver With Dual-Mode Fractional Divider and Noise-Shaping Transimpedance Amplifier in 65 nm CMOS. - Jun Deguchi; Daisuke Miyashita; Yosuke Ogasawara; Gaku Takemura; Masaomi Iwanaga; Kenichi Sami; Rui Ito; Junji Wadatsumi; Yuki Tsuda; Shoko Oda; Shunji Kawaguchi; Nobuyuki Itoh; et al. (IEEE J. Solid State Circuits, 2010)

A-104 dBc/Hz In-Band Phase Noise 3 GHz All Digital PLL with Phase Interpolation Based Hierarchical Time to Digital Converter. - Daisuke Miyashita; Hiroyuki Kobayashi; Jun Deguchi; Shouhei Kousai; Mototsugu Hamada; Ryuichi Fujimoto (IEICE Trans. Electron., 2012)

A 187.5µVrms-read-noise 51mW 1.4Mpixel CMOS image sensor with PMOSCAP column CDS and 10b self-differential offset-cancelled pipeline SAR-ADC. - Jun Deguchi; Fumihiko Tachibana; Makoto Morimoto; Masayoshi Chiba; Takeshi Miyaba; Hideki Tanaka; Kyoichi Takenaka; Satoshi Funayama; Kunihiko Amano; Kazuhide Sugiura; Ryuta Okamoto; Shouhei Kousai (ISSCC, 2013)

A 1.4Mpixel CMOS image sensor with multiple row-rescan based data sampling for optical camera communication. - Jun Deguchi; Toshiyuki Yamagishi; Hideaki Majima; Nau Ozaki; Kazuhiro Hiwada; Makoto Morimoto; Tatsuji Ashitani; Shouhei Kousai (A-SSCC, 2014)

Time-domain neural network: A 48.5 TSOp/s/W neuromorphic chip optimized for deep learning and CMOS technology. - Daisuke Miyashita; Shouhei Kousai; Tomoya Suzuki; Jun Deguchi (A-SSCC, 2016)

Session 6 overview: Image sensors. - Jun Deguchi; David Stoppa (ISSCC, 2016)

F3: Beyond the horizon of conventional computing: From deep learning to neuromorphic systems. - Meng-Fan Chang; Jun Deguchi; Vivek De; Masato Motomura; Shinichiro Shiratake; Marian Verhelst (ISSCC, 2017)

Session 4 overview: Imagers. - Hayato Wakabayashi; Jun Deguchi; Makoto Ikeda (ISSCC, 2017)

A Neuromorphic Chip Optimized for Deep Learning and CMOS Technology With Time-Domain Analog and Digital Mixed-Signal Processing. - Daisuke Miyashita; Shouhei Kousai; Tomoya Suzuki; Jun Deguchi (IEEE J. Solid State Circuits, 2017)

FPGA-based CNN Processor with Filter-Wise-Optimized Bit Precision. - Asuka Maki; Daisuke Miyashita; Kengo Nakata; Fumihiko Tachibana; Tomoya Suzuki; Jun Deguchi (A-SSCC, 2018)

F1: Intelligent energy-efficient systems at the edge of IoT. - Vivek De; Dennis Sylvester; James Myers; Jun Deguchi; Shinichiro Shiratake; Ingrid Verbauwhede (ISSCC, 2018)

A 12.8 GB/S Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth and Large-Capacity Storage Systems. - Yuta Tsubouchi; Daisuke Miyashita; Yuji Satoh; Takashi Toi; Fumihiko Tachibana; Makoto Morimoto; Junji Wadatsumi; Jun Deguchi (VLSI Circuits, 2018)

Post Training Weight Compression with Distribution-based Filter-wise Quantization Step. - Shinichi Sasaki; Asuka Maki; Daisuke Miyashita; Jun Deguchi (COOL CHIPS, 2019)

Live Demonstration: FPGA-Based CNN Accelerator with Filter-Wise-Optimized Bit Precision. - Kengo Nakata; Asuka Maki; Daisuke Miyashita; Fumihiko Tachibana; Tomoya Suzuki; Jun Deguchi (ISCAS, 2019)

A 25.6Gb/s Uplink-Downlink Interface Employing PAM-4-Based 4-Channel Multiplexing and Cascaded CDR Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage Systems. - Takashi Toi; Junji Wadatsumi; Hiroyuki Kobayashi; Yutaka Shimizu; Yuji Satoh; Makoto Morimoto; Rui Ito; Mitsuyuki Ashida; Yuta Tsubouchi; Mai Nozawa; Go Urakawa; Jun Deguchi (ISSCC, 2019)

A 12.8-Gb/s Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth, Large-Capacity Storage Systems. - Yuta Tsubouchi; Daisuke Miyashita; Takashi Toi; Yuji Satoh; Fumihiko Tachibana; Junji Wadatsumi; Makoto Morimoto; Ryuichi Fujimoto; Jun Deguchi (IEEE J. Solid State Circuits, 2019)

Weight Compression MAC Accelerator for Effective Inference of Deep Learning. - Asuka Maki; Daisuke Miyashita; Shinichi Sasaki; Kengo Nakata; Fumihiko Tachibana; Tomoya Suzuki; Jun Deguchi; Ryuichi Fujimoto (IEICE Trans. Electron., 2020)

Quantization Strategy for Pareto-optimally Low-cost and Accurate CNN. - Kengo Nakata; Daisuke Miyashita; Asuka Maki; Fumihiko Tachibana; Shinichi Sasaki; Jun Deguchi; Ryuichi Fujimoto (AICAS, 2021)

Adaptive Quantization Method for CNN with Computational-Complexity-Aware Regularization. - Kengo Nakata; Daisuke Miyashita; Jun Deguchi; Ryuichi Fujimoto (ISCAS, 2021)

Session 15 Overview: Compute-in-Memory Processors for Deep Neural Networks Machine Learning Subcommittee. - Jun Deguchi; Yongpan Liu; Yan Li (ISSCC, 2021)

F3: Silicon Technologies in the Fight Against Pandemics - From Point of Care to Computational Epidemiology. - Nick Van Helleputte; Arijit Raychowdhury; Ping-Hsuan Hsieh; Jun Deguchi; Matteo Perenzoni; Esther Rodríguez-Villegas; Long Yan; Andreia Cathelin; Keith A. Bowman; Chris Van Hoof (ISSCC, 2021)

A Noise-Canceling Charge Pump for Area Efficient PLL Design. - Go Urakawa; Hiroyuki Kobayashi; Jun Deguchi; Ryuichi Fujimoto (IEICE Trans. Electron., 2021)

Introduction to the Special Section on the 2020 Asian Solid-State Circuits Conference (A-SSCC). - Robert Chen-Hao Chang; Wei-Zen Chen; Jun Deguchi (IEEE J. Solid State Circuits, 2021)

Introduction to the Special Issue on the 2020 IEEE International Solid-State Circuits Conference (ISSCC). - Friedel Gerfers; Ping-Hsuan Hsieh; Dejan Markovic; Jun Deguchi; Eric Karl (IEEE J. Solid State Circuits, 2021)

Revisiting a kNN-Based Image Classification System with High-Capacity Storage. - Kengo Nakata; Youyang Ng; Daisuke Miyashita; Asuka Maki; Yu-Chieh Lin 002; Jun Deguchi (ECCV (37), 2022)

A 56-Gb/s PAM4 Transceiver with False-Lock-Aware Locking Scheme for Mueller-Müller CDR. - Fumihiko Tachibana; Huy Cu Ngo; Go Urakawa; Takashi Toi; Mitsuyuki Ashida; Yuta Tsubouchi; Mai Nozawa; Junji Wadatsumi; Hiroyuki Kobayashi; Jun Deguchi (ESSCIRC, 2022)

Introduction to the Special Section on the 2021 IEEE International Solid-State Circuits Conference (ISSCC). - Amir Amirkhany; Tanay Karnik; Shidhartha Das; Jun Deguchi; Yasuhiko Taito (IEEE J. Solid State Circuits, 2022)

A 25.6-Gb/s Interface Employing PAM-4-Based Four-Channel Multiplexing and Cascaded Clock and Data Recovery Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage Systems. - Takashi Toi; Junji Wadatsumi; Hiroyuki Kobayashi; Yutaka Shimizu; Yuji Satoh; Makoto Morimoto; Rui Ito; Mitsuyuki Ashida; Yuta Tsubouchi; Mai Nozawa; Go Urakawa; Jun Deguchi; et al. (IEEE J. Solid State Circuits, 2022)

RaLLe: A Framework for Developing and Evaluating Retrieval-Augmented Large Language Models. - Yasuto Hoshi; Daisuke Miyashita; Youyang Ng; Kento Tatsuno; Yasuhiro Morioka; Osamu Torii; Jun Deguchi (EMNLP (Demos), 2023)

Can a Frozen Pretrained Language Model be used for Zero-shot Neural Retrieval on Entity-centric Questions? - Yasuto Hoshi; Daisuke Miyashita; Yasuhiro Morioka; Youyang Ng; Osamu Torii; Jun Deguchi (CoRR, 2023)

SimplyRetrieve: A Private and Lightweight Retrieval-Centric Generative AI Tool. - Youyang Ng; Daisuke Miyashita; Yasuto Hoshi; Yasuhiro Morioka; Osamu Torii; Tomoya Kodama; Jun Deguchi (CoRR, 2023)

Rethinking Sparse Lexical Representations for Image Retrieval in the Age of Rising Multi-modal Large Language Models. - Kengo Nakata; Daisuke Miyashita; Youyang Ng; Yasuto Hoshi; Jun Deguchi (ECCV Workshops (17), 2024)

Mitigation of Accuracy Degradation in 3D Flash Memory Based Approximate Nearest Neighbor Search with Binary Tree Balanced Soft Clustering for Retrieval-Augmented AI. - Shinichi Sasaki; Yuta Aiba; Yusuke Komano; Takahiko Iizuka; Motohiko Fujimatsu; Atsushi Kawasumi; Daisuke Miyashita; Jun Deguchi; Takashi Maeda; Shinji Miyano; Tooru Maruyama (NewCAS, 2024)

AiSAQ: All-in-Storage ANNS with Product Quantization for DRAM-free Information Retrieval. - Kento Tatsuno; Daisuke Miyashita; Taiga Ikeda; Kiyoshi Ishiyama; Kazunari Sumiyoshi; Jun Deguchi (CoRR, 2024)

A Mueller-Müller CDR with False-Lock-Aware Locking Scheme for a 56-Gb/s ADC-Based PAM4 Transceiver. - Fumihiko Tachibana; Huy Cu Ngo; Go Urakawa; Takashi Toi; Mitsuyuki Ashida; Yuta Tsubouchi; Mai Nozawa; Junji Wadatsumi; Hiroyuki Kobayashi; Jun Deguchi (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2024)

Accelerating CNN Inference with an Adaptive Quantization Method Using Computational Complexity-Aware Regularization. - Kengo Nakata; Daisuke Miyashita; Jun Deguchi; Ryuichi Fujimoto (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2025)

On Storage Neural Network Augmented Approximate Nearest Neighbor Search. - Taiga Ikeda; Daisuke Miyashita; Jun Deguchi (CoRR, 2025)