Design for Testability of a 32-Bit Microprocessor, the TX1. - Yasuyuki Nozuyama; Akira Nishimura; Jun Iwamura (ITC, 1988)

Implementation and Evaluation of Microinstruction-Controlled Self Test Using a Masked Microinstruction Scheme. - Yasuyuki Nozuyama; Akira Nishimura; Jun Iwamura (ITC, 1989)

Design for testability of a 32-bit TRON microprocessor. - Yasuyuki Nozuyama; Akira Nishimura; Jun Iwamura (Microprocess. Microsystems, 1989)

Design of a 32 bit microprocessor, TX1. - Takeji Tokumaru; Eeji Masuda; Chikahiro Hori; Kimiyoshi Usami; Misao Miyata; Jun Iwamura (IEEE J. Solid State Circuits, 1989)

Anatomy of platform-based design: is it the savior of UDSM SoC design crisis? - Tadahiko Nakamura; Takahide Inoue; Bob Altizer; Ken Chen; Jun Iwamura; Masasuke Kishi; Grant Martin; Augusto De Oliveira (ASP-DAC, 2003)