A low-noise wide range delta-sigma frequency synthesizer for DTV broadband. - Te-Wen Liao; Jun-Ren Su; Chung-Chih Hung (ICECS, 2010)

Low-spur technique for Integer-N phase-locked loop. - Te-Wen Liao; Jun-Ren Su; Chung-Chih Hung (MWSCAS, 2012)

Random Pulsewidth Matching Frequency Synthesizer With Sub-Sampling Charge Pump. - Te-Wen Liao; Chia-Min Chen; Jun-Ren Su; Chung-Chih Hung (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

Ring-VCO based low noise and low spur frequency synthesizer. - Te-Wen Liao; Jun-Ren Su; Chung-Chih Hung (ISCAS, 2013)

Sub-sampling charge pump and random pulsewidth matching technique for frequency synthesizer. - Te-Wen Liao; Jun-Ren Su; Chung-Chih Hung (MWSCAS, 2013)

Spur-Reduction Frequency Synthesizer Exploiting Randomly Selected PFD. - Te-Wen Liao; Jun-Ren Su; Chung-Chih Hung (IEEE Trans. Very Large Scale Integr. Syst., 2013)

All-Digital Fast-Locking Pulsewidth-Control Circuit With Programmable Duty Cycle. - Jun-Ren Su; Te-Wen Liao; Chung-Chih Hung (IEEE Trans. Very Large Scale Integr. Syst., 2013)