An error distribution based nonlinear companding method for analog behavioral modeling via wavelet approximation. - Xuan Zeng 001; Jun Tao 001; Yangfeng Su; Wenbing Chen; Dian Zhou (ISCAS (3), 2003)

Analog circuit behavioral modeling via wavelet collocation method with auto-companding. - Jian Wang; Jun Tao 001; Xuan Zeng 001; Charles C. Chiang; Dian Zhou (ASP-DAC, 2004)

Block SAPOR: block Second-order Arnoldi method for Passive Order Reduction of multi-input multi-output RCS interconnect circuits. - Bang Liu; Xuan Zeng 001; Yangfeng Su; Jun Tao 001; Zhaojun Bai; Charles C. Chiang; Dian Zhou (ASP-DAC, 2005)

A novel wavelet method for noise analysis of nonlinear circuits. - Xuan Zeng 001; Bang Liu; Jun Tao 001; Charles C. Chiang; Dian Zhou (ASP-DAC, 2005)

A one-shot projection method for interconnects with process variations. - Jun Tao 001; Xuan Zeng 001; Fan Yang 001; Yangfeng Su; Lihong Feng; Wei Cai 003; Dian Zhou; Charles C. Chiang (ISCAS, 2006)

Stochastic Sparse-grid Collocation Algorithm (SSCA) for Periodic Steady-State Analysis of Nonlinear System with Process Variations. - Jun Tao 001; Xuan Zeng 001; Wei Cai 003; Yangfeng Su; Dian Zhou; Charles C. Chiang (ASP-DAC, 2007)

Timing yield driven clock skew scheduling considering non-Gaussian distributions of critical path delays. - Yi Wang; Wai-Shing Luk; Xuan Zeng 001; Jun Tao 001; Changhao Yan; Jiarong Tong; Wei Cai 003; Jia Ni (DAC, 2008)

Characterizing Intra-Die Spatial Correlation Using Spectral Density Method. - Qiang Fu; Wai-Shing Luk; Jun Tao 001; Changhao Yan; Xuan Zeng 001 (ISQED, 2008)

Adaptive Stochastic Collocation Method (ASCM) for Parameterized Statistical Timing Analysis with Quadratic Delay Model. - Yi Wang; Xuan Zeng 001; Jun Tao 001; Hengliang Zhu; Xu Luo; Changhao Yan; Wei Cai 003 (ISQED, 2008)

Adaptive Stochastic Collocation Method for Parameterized Statistical Timing Analysis with Quadratic Delay Model. - Yi Wang; Xuan Zeng 001; Jun Tao 001; Hengliang Zhu; Wei Cai 003 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008)

Provably good and practically efficient algorithms for CMP dummy fill. - Chunyang Feng; Hai Zhou 001; Changhao Yan; Jun Tao 001; Xuan Zeng 001 (DAC, 2009)

Binning optimization based on SSTA for transparently-latched circuits. - Min Gong; Hai Zhou 001; Jun Tao 001; Xuan Zeng 001 (ICCAD, 2009)

Characterizing Intra-Die Spatial Correlation Using Spectral Density Fitting Method. - Qiang Fu; Wai-Shing Luk; Jun Tao 001; Changhao Yan; Xuan Zeng 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

Intra-Die Spatial Correlation Extraction with Maximum Likelihood Estimation Method for Multiple Test Chips. - Qiang Fu; Wai-Shing Luk; Jun Tao 001; Xuan Zeng 001; Wei Cai 003 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

A Modified Nested Sparse Grid Based Adaptive Stochastic Collocation Method for Statistical Static Timing Analysis. - Xu Luo; Fan Yang 001; Xuan Zeng 001; Jun Tao 001; Hengliang Zhu; Wei Cai 003 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

Intel LVS logic as a combinational logic paradigm in CNT technology. - Bao Liu; Zhen Cao; Jun Tao 001; Xuan Zeng 001; Pushan Tang; H.-S. Philip Wong (NANOARCH, 2010)

Stochastic Sparse-Grid Collocation Algorithm for Steady-State Analysis of Nonlinear System with Process Variations. - Jun Tao 001; Xuan Zeng 001; Wei Cai 003; Yangfeng Su; Dian Zhou (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010)

Efficient Approximation Algorithms for Chemical Mechanical Polishing Dummy Fill. - Chunyang Feng; Hai Zhou 001; Changhao Yan; Jun Tao 001; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Binning Optimization for Transparently-Latched Circuits. - Min Gong; Hai Zhou 001; Li Li 021; Jun Tao 001; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

SSTA Scheme for Multiple Input Switching Case Based on Stochastic Collocation Method. - Gengsheng Chen; Chenxi Qian; Jun Tao 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012)

An efficient method for gradient-aware dummy fill synthesis. - Peng Wu; Hai Zhou 001; Changhao Yan; Jun Tao 001; Xuan Zeng 001 (Integr., 2013)

Toward efficient programming of reconfigurable radio frequency (RF) receivers. - Jun Tao 001; Ying-Chih Wang; Minhee Jun; Xin Li 001; Rohit Negi; Tamal Mukherjee; Lawrence T. Pileggi (ASP-DAC, 2014)

Joint invariant estimation of RF impairments for reconfigurable Radio Frequency(RF) front-end. - Minhee Jun; Rohit Negi; Ying-Chih Wang; Tamal Mukherjee; Xin Li 001; Jun Tao 001; Larry T. Pileggi (GLOBECOM Workshops, 2014)

Environment-Adaptable Efficient Optimization for Programming of Reconfigurable Radio Frequency (RF) Receivers. - Minhee Jun; Rohit Negi; Jun Tao 001; Ying-Chih Wang; Shihui Yin; Tamal Mukherjee; Xin Li 001; Lawrence T. Pileggi (MILCOM, 2014)

Integrated Algorithm for 3-D IC Through-Silicon Via Assignment. - Xiaodong Liu 018; Gary K. Yeap; Jun Tao 001; Xuan Zeng 001 (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Efficient spatial variation modeling via robust dictionary learning. - Changhai Liao; Jun Tao 001; Xuan Zeng 001; Yangfeng Su; Dian Zhou; Xin Li 001 (DATE, 2016)

Efficient statistical analysis for correlated rare failure events via asymptotic probability approximation. - Handi Yu; Jun Tao 001; Changhai Liao; Yangfeng Su; Dian Zhou; Xuan Zeng 001; Xin Li 001 (ICCAD, 2016)

Efficient Hybrid Performance Modeling for Analog Circuits Using Hierarchical Shrinkage Priors. - Changhai Liao; Jun Tao 001; Handi Yu; Zhangwen Tang; Yangfeng Su; Dian Zhou; Xuan Zeng 001; Xin Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Efficient Spatial Variation Modeling of Nanoscale Integrated Circuits Via Hidden Markov Tree. - Changhai Liao; Jun Tao 001; Xuan Zeng 001; Yangfeng Su; Dian Zhou; Xin Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Harvesting Design Knowledge From the Internet: High-Dimensional Performance Tradeoff Modeling for Large-Scale Analog Circuits. - Jun Tao 001; Changhai Liao; Xuan Zeng 001; Xin Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

A high performance real-time edge detection system with NEON. - Kaixuan Zhang; Li Ding; Yujie Cai; Wenbo Yin; Fan Yang 001; Jun Tao 001; Lingli Wang (ASICON, 2017)

Efficient programming of reconfigurable radio frequency (RF) systems. - Mohamed Baker Alawieh; Fa Wang; Jun Tao 001; Shihui Yin; Minhee Jun; Xin Li 001; Tamal Mukherjee; Rohit Negi (ICCAD, 2017)

Efficient Performance Trade-off Modeling for Analog Circuit based on Bayesian Neural Network. - Zhengqi Gao; Jun Tao 001; Fan Yang 001; Yangfeng Su; Dian Zhou; Xuan Zeng 001 (ICCAD, 2019)

Graph-Constrained Sparse Performance Modeling for Analog Circuit Optimization via SDP Relaxation. - Jun Tao 001; Yangfeng Su; Dian Zhou; Xuan Zeng 001; Xin Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Exploring a Bayesian Optimization Framework Compatible with Digital Standard Flow for Soft-Error-Tolerant Circuit. - Yan Li 084; Xiaoyoung Zeng; Zhengqi Gao; Liyu Lin; Jun Tao 001; Jun Han 003; Xu Cheng 002; Mehdi B. Tahoori; Xiaoyang Zeng (DAC, 2020)

Multi-Corner Parametric Yield Estimation via Bayesian Inference on Bernoulli Distribution with Conjugate Prior. - Jiahe Shi; Zhengqi Gao; Jun Tao 001; Yangfeng Su; Dian Zhou; Xuan Zeng 001 (ISCAS, 2020)

Projection based Active Gaussian Process Regression for Pareto Front Modeling. - Zhengqi Gao; Jun Tao 001; Yangfeng Su; Dian Zhou; Xuan Zeng 001 (CoRR, 2020)

Efficient Rare Failure Analysis Over Multiple Corners via Correlated Bayesian Inference. - Zhengqi Gao; Jun Tao 001; Yangfeng Su; Dian Zhou; Xuan Zeng 001; Xin Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Efficient Parametric Yield Estimation Over Multiple Process Corners via Bayesian Inference Based on Bernoulli Distribution. - Zhengqi Gao; Jun Tao 001; Dian Zhou; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Efficient Statistical Analysis for Correlated Rare Failure Events via Asymptotic Probability Approximation. - Fulin Peng; Handi Yu; Jun Tao 001; Yangfeng Su; Dian Zhou; Xuan Zeng 001; Xin Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

A Synthesizable Constant Tuning Gain Technique for Wideband LC-VCO Design. - Xiaoxue Sun; Chenyang Kong; Yingyu Chen; Jun Tao 001; Zhangwen Tang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Analog/RF Post-silicon Tuning via Bayesian Optimization. - Renjian Pan; Jun Tao 001; Yangfeng Su; Dian Zhou; Xuan Zeng 001; Xin Li 001 (ACM Trans. Design Autom. Electr. Syst., 2020)

Bayesian Inference on Introduced General Region: An Efficient Parametric Yield Estimation Method for Integrated Circuits. - Zhengqi Gao; Zihao Chen; Jun Tao 001; Yangfeng Su; Dian Zhou; Xuan Zeng 001 (ASP-DAC, 2021)

MC-LSTM: Real-Time 3D Human Action Detection System for Intelligent Healthcare Applications. - Jun Yin; Jun Han 003; Ruiqi Xie; Chenghao Wang 006; Xuyang Duan; Yitong Rong; Xiaoyang Zeng; Jun Tao 001 (IEEE Trans. Biomed. Circuits Syst., 2021)

An Automated Compiler for RISC-V Based DNN Accelerator. - Zheng Wu; Wuzhen Xie; Xiaoling Yi; Haitao Yang; Ruiyao Pu; Xiankui Xiong; Haidong Yao; Chixiao Chen; Jun Tao 001; Fan Yang 001 (ISCAS, 2022)

NNASIM: An Efficient Event-Driven Simulator for DNN Accelerators with Accurate Timing and Area Models. - Xiaoling Yi; Jiangnan Yu; Zheng Wu; Xiankui Xiong; Dong Xu 015; Chixiao Chen; Jun Tao 001; Fan Yang 001 (ISCAS, 2022)

Unsupervised deep domain adaptation framework in remote acoustic time parametric imaging. - Yuezhou Wu; Jun Tao 001; Qiang Fu; Changjiang Liu (IET Signal Process., 2022)

Fast Statistical Analysis of Rare Failure Events With Truncated Normal Distribution in High-Dimensional Variation Space. - Zhengqi Gao; Jun Tao 001; Yangfeng Su; Dian Zhou; Xuan Zeng 001; Xin Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Correlated Rare Failure Analysis via Asymptotic Probability Evaluation. - Jun Tao 001; Handi Yu; Yangfeng Su; Dian Zhou; Xuan Zeng 001; Xin Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Adaptable Approximate Multiplier Design Based on Input Distribution and Polarity. - Zhen Li; Su Zheng; Jide Zhang; Yao Lu; Jingbo Gao; Jun Tao 001; Lingli Wang (IEEE Trans. Very Large Scale Integr. Syst., 2022)

TPNoC: An Efficient Topology Reconfigurable NoC Generator. - Jiangnan Yu; Fan Yang 001; Xiaoling Yi; Chixiao Chen; Jun Tao 001; Dong Xu 015; Xiankui Xiong; Haitao Yang (ACM Great Lakes Symposium on VLSI, 2023)

A Scalable Die-to-Die Interconnect with Replay and Repair Schemes for 2.5D/3D Integration. - Jie Liao; Bo Jiao; Jinshan Zhang 006; Shiwei Liu 002; Hao Jiang 024; Jun Tao 001; Wenning Jiang; Qi Liu 010; Lihua Zhang; Haozhe Zhu; Chixiao Chen (ISCAS, 2023)

Analysis and Design of a Dual-Mode VCO With Inherent Mode Compensation Enabling a 7.9-14.3-GHz 85-fs-rms Jitter PLL. - Yizhuo Wang; Jiahe Shi; Hao Xu 005; Shujiang Ji; Yiyun Mao; Tenghao Zou; Jun Tao 001; Hao Min; Na Yan (IEEE J. Solid State Circuits, 2023)

SPARK: An automatic Score-Power-Area efficient RISC-V processor microarchitecture SeeKer. - Qiang Li; Jun Tao 001; Jun Han 003 (Microelectron. J., 2023)

Correlated Bayesian Model Fusion: Efficient High-Dimensional Performance Modeling of Analog/RF Integrated Circuits Over Multiple Corners. - Zhengqi Gao; Fa Wang; Jun Tao 001; Yangfeng Su; Xuan Zeng 001; Xin Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Efficient Statistical Parameter Extraction for Modeling MOSFET Mismatch. - Kun Wu; Nanlin Guo; Fei Li; Nengyong Zhu; Jun Tao 001; Xin Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Self-Supervised On-Device Federated Learning From Unlabeled Streams. - Jiahe Shi; Yawen Wu; Dewen Zeng; Jun Tao 001; Jingtong Hu; Yiyu Shi 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Auto-ISP: An Efficient Real-Time Automatic Hyperparameter Optimization Framework for ISP Hardware System. - Jiaming Liu; Zihao Liu; Xuan Huang; Ruoxi Zhu; Qi Zheng 004; Zhijian Hao; Tao Liu 023; Jun Tao 001; Yibo Fan (DAC, 2024)

TransMap: An Efficient CGRA Mapping Framework via Transformer and Deep Reinforcement Learning. - Jingyuan Li 003; Yuan Dai; Yihan Hu 003; Jiangnan Li; Wenbo Yin; Jun Tao 001; Lingli Wang (IPDPS (Workshops), 2024)

Yield Optimization for Analog Circuits over Multiple Corners via Bayesian Neural Networks: Enhancing Circuit Reliability under Environmental Variation. - Nanlin Guo; Fulin Peng; Jiahe Shi; Fan Yang 001; Jun Tao 001; Xuan Zeng 001 (ACM Trans. Design Autom. Electr. Syst., 2024)

A Low Valid Throughput Loss LDPC Codec Architecture With Variable Code Rate. - Jiaming Liu; Zhijian Hao; Lingxiu Zhao; Jiazheng Lian; Jun Tao 001; Yibo Fan; Quanyuan Feng (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

FPIA: Communication-Aware Multi-Chiplet Integration With Field-Programmable Interconnect Fabric on Reusable Silicon Interposer. - Bo Jiao; Lei Xu; Xinyu Yu; Haitao Yang; Haozhe Zhu; Yu Wang; Jundong Zhu; Dexin Wen; Lingli Wang; Jun Tao 001; Chixiao Chen; Yinhe Han 001; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

37.4 SHINSAI: A 586mm2 Reusable Active TSV Interposer with Programmable Interconnect Fabric and 512Mb 3D Underdeck Memory. - Bo Jiao; Haozhe Zhu; Yuman Zeng; Yongjiang Li; Jie Liao; Siyao Jia; Mochen Tian; Zexing Chen; Jundong Zhu; Dexin Wen; Yan Wang; Yu Wang 046; et al. (ISSCC, 2025)

Robust analog/RF circuit design via Cycle-Consistent Generative Adversarial Networks. - Nanlin Guo; Jun Tao 001; Xuan Zeng 001; Xin Li 001 (Integr., 2025)

Efficient Design Optimization for Diffractive Deep Neural Networks. - Kun Wu; Yuncheng Liu; Hui Gao; Jun Tao 001; Wei Xiong; Xin Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)