A methodology for fault model development for hierarchical linear systems. - Yin-Chao Huang; Chung-Len Lee 001; Jun-Weir Lin; Jwu E. Chen; Chauchin Su (Asian Test Symposium, 2000)

Fault Diagnosis for Linear Analog Circuits. - Jun-Weir Lin; Chung-Len Lee 001; Chauchin Su; Jwu E. Chen (J. Electron. Test., 2001)

An Efficient Test and Diagnosis Scheme for the Feedback Type of Analog Circuits with Minimal Added Circuits. - Jun-Weir Lin; Chung-Len Lee 001; Jwu E. Chen (DATE, 2002)