Dual-Phase Tapped-Delay-Line Time-to-Digital Converter With On-the-Fly Calibration Implemented in 40 nm FPGA. - Jun Yeon Won; Sun Il Kwon; Hyun Suk Yoon; Guen Bae Ko; Jeong-Whan Son; Jae Sung Lee (IEEE Trans. Biomed. Circuits Syst., 2016)

Time-to-Digital Converter Using a Tuned-Delay Line Evaluated in 28-, 40-, and 45-nm FPGAs. - Jun Yeon Won; Jae Sung Lee (IEEE Trans. Instrum. Meas., 2016)

Highly Integrated FPGA-Only Signal Digitization Method Using Single-Ended Memory Interface Input Receivers for Time-of-Flight PET Detectors. - Jun Yeon Won; Jae Sung Lee (IEEE Trans. Biomed. Circuits Syst., 2018)

Drift with Devil: Security of Multi-Sensor Fusion based Localization in High-Level Autonomous Driving under GPS Spoofing. - Junjie Shen 001; Jun Yeon Won; Zeyuan Chen; Qi Alfred Chen (USENIX Security Symposium, 2020)

Drift with Devil: Security of Multi-Sensor Fusion based Localization in High-Level Autonomous Driving under GPS Spoofing (Extended Version). - Junjie Shen 001; Jun Yeon Won; Zeyuan Chen; Qi Alfred Chen (CoRR, 2020)

Demo: Attacking Multi-Sensor Fusion based Localization in High-Level Autonomous Driving. - Junjie Shen 001; Jun Yeon Won; Zeyuan Chen; Qi Alfred Chen (SP (Workshops), 2021)

Development and Initial Results of a Brain PET Insert for Simultaneous 7-Tesla PET/MRI Using an FPGA-Only Signal Digitization Method. - Jun Yeon Won; Haewook Park; Seung-Eun Lee; Jeong-Whan Son; Yina Chung; Guen Bae Ko; Kyeong Yun Kim; Junghyun Song; Seongho Seo; Yeunchul Ryu; Jun-Young Chung; Jae Sung Lee (IEEE Trans. Medical Imaging, 2021)

SymLM: Predicting Function Names in Stripped Binaries via Context-Sensitive Execution-Aware Code Embeddings. - Xin Jin; Kexin Pei; Jun Yeon Won; Zhiqiang Lin 001 (CCS, 2022)

4.5 Gsps MIPI D-PHY Receiver Circuit for Automatic Test Equipment. - Seongkwan Lee; Cheolmin Park; Minho Kang; Jun Yeon Won; HyungSun Ryu; Jaemoo Choi; Byunghyun Yim (ITC, 2022)

What You See is Not What You Get: Revealing Hidden Memory Mapping for Peripheral Modeling. - Jun Yeon Won; Haohuang Wen; Zhiqiang Lin 001 (RAID, 2022)

Method for Adjusting Termination Resistance Using PMU in DC Test. - Seongkwan Lee; Minho Kang; Cheolmin Park; Jun Yeon Won; Jaemoo Choi (ITC, 2023)

Method for Diagnosing Channel Damage Using FPGA Transceiver. - Seongkwan Lee; Jun Yeon Won; Cheolmin Park; Minho Kang; Jaemoo Choi (ITC, 2023)

Probe Card Ground Noise Canceling Circuit. - Seongkwan Lee; Minho Kang; Cheolmin Park; Jun Yeon Won; Jaemoo Choi; Chanyeol Park; Sunyong Park; Woonphil Yang (ITC, 2024)

FPGA-Only Implementation of MIPI C-PHY Receiver Using Blind Oversampling CDR for CMOS Image Sensors. - Jun Yeon Won; Shinki Jeong; Seongkwan Lee; Minho Kang; Insu Yang; Jaemoo Choi (FPGA, 2025)

CarPlay at Risk: Unveiling Security Threats of Third-Party Infotainment Adapters. - Jun Yeon Won; Wenzhuo Wang; Keith A. Redmill; Zhiqiang Lin 001 (VehicleSec, 2025)