New dynamic flip-flops for high-speed dual-modulus prescaler. - Ching-Yuan Yang; Guang-Kaai Dehng; June-Ming Hsu; Shen-Iuan Liu (IEEE J. Solid State Circuits, 1998)

Clock-deskew buffer using a SAR-controlled delay-locked loop. - Guang-Kaai Dehng; June-Ming Hsu; Ching-Yuan Yang; Shen-Iuan Liu (IEEE J. Solid State Circuits, 2000)

A 900-MHz 1-V CMOS frequency synthesizer. - Guang-Kaai Dehng; Ching-Yuan Yang; June-Ming Hsu; Shen-Iuan Liu (IEEE J. Solid State Circuits, 2000)

A dual-band enhanced harmonic rejection filter for modulators in GSM and DCS transmitters. - Peng-Un Su; June-Ming Hsu (ESSCIRC, 2003)

A 0.18-μm CMOS offset-PLL upconversion modulation loop IC for DCS1800 transmitter. - June-Ming Hsu (IEEE J. Solid State Circuits, 2003)