SRTLock: A Sensitivity Resilient Two-Tier Logic Encryption Scheme. - Nikhil Saxena; Ram Venkat Narayanan; Juneet Kumar Meka; Ranga Vemuri (iSES, 2021)

Analysis of the Satisfiability Attack Against Logic Encryption Using Synthetic Benchmarks. - Juneet Kumar Meka; Shrinidhi Venkatesh; Ranga Vemuri (iSES, 2022)

Attributed Graph Transformation for Generating Synthetic Benchmarks for Hardware Security. - Juneet Kumar Meka; Ranga Vemuri (ISQED, 2023)

ACT: Attributed Circuit Transformation System for Synthetic Circuit Generation. - Juneet Kumar Meka; Ranga Vemuri (MWSCAS, 2024)

Pattern Based Synthetic Benchmark Generation for Hardware Security Applications. - Juneet Kumar Meka; Satya AmarKant Marupureddy; Ranga Vemuri (VLSID, 2024)