Hardware acceleration of iterative image reconstruction for X-ray computed tomography. - Jung Kuk Kim; Zhengya Zhang; Jeffrey A. Fessler (ICASSP, 2011)

Forward-Projection Architecture for Fast Iterative Image Reconstruction in X-Ray CT. - Jung Kuk Kim; Jeffrey A. Fessler; Zhengya Zhang (IEEE Trans. Signal Process., 2012)

A 6.67mW sparse coding ASIC enabling on-chip learning and inference. - Jung Kuk Kim; Phil Knag; Thomas Chen 003; Zhengya Zhang (VLSIC, 2014)

Efficient Hardware Architecture for Sparse Coding. - Jung Kuk Kim; Phil Knag; Thomas Chen 003; Zhengya Zhang (IEEE Trans. Signal Process., 2014)

A 640M pixel/s 3.65mW sparse event-driven neuromorphic object recognition processor with on-chip learning. - Jung Kuk Kim; Phil Knag; Thomas Chen 003; Zhengya Zhang (VLSIC, 2015)

A Sparse Coding Neural Network ASIC With On-Chip Learning for Feature Extraction and Encoding. - Phil Knag; Jung Kuk Kim; Thomas Chen 003; Zhengya Zhang (IEEE J. Solid State Circuits, 2015)