A 1.8-Gb/s burst-mode clock and data recovery circuit with a 1/4-rate clock technique. - Jun-Hong Weng; Meng-Ting Tsai; Jung-Mao Lin; Ching-Yuan Yang (ISCAS, 2006)

A Baseband Transceiver for IEEE 802.16e-2005 MIMO-OFDMA Uplink Communications. - Jung-Mao Lin; Hsi-Pin Ma; Pangan Ting (GLOBECOM, 2007)

A 1.25-Gb/s Burst-Mode Half-Rate Clock and Data Recovery Circuit Using Realigned Oscillation. - Ching-Yuan Yang; Jung-Mao Lin (IEICE Trans. Electron., 2007)

A 2.5Gb/s oversampling clock and data recovery circuit with frequency calibration technique. - Kai Pong Wu; Ching-Yuan Yang; Jung-Mao Lin (APCCAS, 2008)

Optimal Detector for Multitaper Spectrum Estimator in Cognitive Radios. - Tsung-Wei Chiang; Jung-Mao Lin; Hsi-Pin Ma (GLOBECOM, 2009)

A baseband Testbed for Uplink Mobile MIMO WiMAX Communications. - Yu-Jen Wu; Jung-Mao Lin; Hsin-Yi Yu; Hsi-Pin Ma (ISCAS, 2009)

Live Demonstration: A Baseband Testbed for Uplink Mobile MIMO WiMAX Communications. - Yu-Jen Wu; Jung-Mao Lin; Hsin-Yi Yu; Hsi-Pin Ma (ISCAS, 2009)

A high performance baseband transceiver for SISO-/MIMO-OFDA uplink communications. - Jung-Mao Lin; Hsi-Pin Ma (IEEE Trans. Wirel. Commun., 2009)

A Reliable Adaptive Multitaper Spectral Detector in Wideband Strong Interference Environments. - Jung-Mao Lin; Hsi-Pin Ma; Danijela Cabric (GLOBECOM, 2010)

A Power Efficient Baseband Engine for Multiuser Mobile MIMO-OFDMA Communications. - Jung-Mao Lin; Hsin-Yi Yu; Yu-Jen Wu; Hsi-Pin Ma (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

A Fast-Locking All-Digital Phase-Locked Loop With Dynamic Loop Bandwidth Adjustment. - Jung-Mao Lin; Ching-Yuan Yang (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

A 2.5-Gb/s DLL-Based Burst-Mode Clock and Data Recovery Circuit With 4× Oversampling. - Jung-Mao Lin; Ching-Yuan Yang; Hsin-Ming Wu (IEEE Trans. Very Large Scale Integr. Syst., 2015)