Automatic Synthesis of Gate-Level Speed-Independent Control Circuits from Signal Transition Graphs. - Sung Tae Jung; Eun Sei Park; Jung Sik Kim; Chu Shik Jhon (ISCAS, 1995)

A Hybrid Model for Worm Simulations in a Large Network. - Eul-Gyu Im; Jung Sik Kim; In Woo Noh; Hyun Jun Jang (PAISI, 2007)

A Current-Mode Four-Phase Synchronous Buck Converter With Dynamic Dead-Time Control. - Jun Tang 003; Tian Guo 006; Jung Sik Kim; Jeongjin Roh (IEEE Access, 2021)

Design of High PSRR Bandgap Reference Using Impedance-Splitting Negative-R-Assisted Technique. - Jung Sik Kim; Jeongjin Roh (ICECS, 2023)

A 13.5-nA Quiescent Current LDO With Adaptive Ultra-Low-Power Mode for Low-Power IoT Applications. - Jung Sik Kim; Khurram Javed; Kyounghyun Min; Jeongjin Roh (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Design of a Low-Power and Area-Efficient LDO Regulator Using a Negative-R-Assisted Technique. - Jung Sik Kim; Khurram Javed; Jeongjin Roh (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A High-PSRR NMOS LDO Regulator With Intrinsic Gain-Tracking Ripple Cancellation Technique. - Jung Sik Kim; Seunggyun Ha; Hongyup Jeong; Jeongjin Roh (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)