What Lies Ahead for Resistance-Based Memory Technologies? - Yoon-Jong Song; Gitae Jeong; In-Gyu Baek; Jungdal Choi (Computer, 2013)

A 176-Stacked 512Gb 3b/Cell 3D-NAND Flash with 10.8Gb/mm2 Density with a Peripheral Circuit Under Cell Array Architecture. - Jae-Woo Park; Doogon Kim; Sunghwa Ok; Jaebeom Park; Taeheui Kwon; Hyunsoo Lee; Sungmook Lim; Sunyoung Jung; Hyeong-Jin Choi; Taikyu Kang; Gwan Park; Chul-Woo Yang; et al. (ISSCC, 2021)

A 1-Tb, 4b/Cell, 176-Stacked-WL 3D-NAND Flash Memory with Improved Read Latency and a 14.8Gb/mm2 Density. - Wanik Cho; Jongseok Jung; Jongwoo Kim; Junghoon Nam; Sangkyu Lee; Yujong Noh; Dauni Kim; Wanseob Lee; Kayoung Cho; Kwanho Kim; Heejoo Lee; Sooyeol Chai; et al. (ISSCC, 2022)

A High-Performance 1Tb 3b/Cell 3D-NAND Flash with a 194MB/s Write Throughput on over 300 Layers $ mathsf{i}$. - Bvunarvul Kim; Seungpil Lee; Beomseok Hah; Kanawoo Park; Yongsoon Park; Kangwook Jo; Yujong Noh; Hyeon-Cheon Seol; Hyunsoo Lee; Jae-Hyeon Shin; Seongjin Choi; Youngdon Jung; et al. (ISSCC, 2023)

A 321-Layer 2Tb 4b/cell 3D-NAND-Flash Memory with a 75MB/s Program Throughput. - Wanik Cho; Chanhui Jeong; Jongwoo Kim; Jongseok Jung; Keunseon Ahn; Jayoon Goo; Sangkyu Lee; Kayoung Cho; Tei Cho; Dauni Kim; Gwan Park; Yushin Ahn; et al. (ISSCC, 2025)