A 6-bit drift-resilient readout scheme for multi-level Phase-Change Memory. - Aravinthan Athmanathan; Milos Stanisavljevic; Junho Cheon; Seokjoon Kang; Changyong Ahn; Junghyuk Yoon; Min-Chul Shin; Taekseung Kim; Nikolaos Papandreou; Haris Pozidis; Evangelos Eleftheriou (A-SSCC, 2014)

A Quasi-Digital Ultra-Fast Capacitor-Less Low-Dropout Regulator Based on Comparator Control for x8 Current Spike of PCRAM Systems. - Sung-Won Choi; Yeunhee Huh; Sang-Hui Park; Kye-Seok Yoon; Jun-Suk Bang; Se-Un Shin; Yong-Min Ju; Yu-Jin Yang; Junghyuk Yoon; Changyong Ahn; Taekseung Kim; Sung-Wan Hong; et al. (VLSI Circuits, 2018)

A Reference-Free Temperature-Dependency-Compensating Readout Scheme for Phase-Change Memory Using Flash-ADC-Configured Sense Amplifiers. - Dong-Hwan Jin; Ji-Wook Kwon; Min-Jae Seo; Mi-Young Kim; Min-Chul Shin; Seokjoon Kang; Junghyuk Yoon; Taek-Seung Kim; Seung-Tak Ryu (IEEE J. Solid State Circuits, 2019)

First Demonstration of Fully Integrated 16 nm Half-Pitch Selector Only Memory (SOM) for Emerging CXL Memory. - Myoungsub Kim; Yooncheol Bae; Jaehyuk Park; Jeongho Yeon; Hyungjoon Shim; Sehyun Jin; Hyunsoo Kim; Sangchul Oh; Gapsok Do; Dongyeol Yun; Hyung Dong Lee; David Ahn; et al. (VLSI Technology and Circuits, 2024)