A 243μW 97.4dB-DR 50kHz-BW Multi-Rate CT Zoom ADC with Inherent DAC Mismatch Tolerance. - Junghyun Yoon; Moon Hyung Jang; Changuk Lee; Yong Lim; Youngcheol Chae (CICC, 2023)

Design-Technology Co-Optimization with Standard Cell Layout Generator for Pin Configurations. - Junghyun Yoon; Heechun Park (ISQED, 2024)

An Intrinsically Linear Multi-Rate Continuous-Time Zoom ADC Achieving 97.4-dB DR and 105.7-dB SFDR in 50-kHz Signal Bandwidth. - Junghyun Yoon; Moon Hyung Jang; Changuk Lee; Yong Lim; Youngcheol Chae (IEEE J. Solid State Circuits, 2025)

A 500-kS/s Continuous-Time Linear-Exponential Incremental ADC Achieving 90.1-dB DR and 103.1-dB SFDR. - Wonseon Lee; Hyeonho Han; Yigi Kwon; Seokho Yoon; Junghyun Yoon; Sanghoon Lee 009; Moon Hyung Jang; Youngcheol Chae (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)