LIME: a framework for debugging load imbalance in multi-threaded execution. - Jungju Oh; Christopher J. Hughes; Guru Venkataramani; Milos Prvulovic (ICSE, 2011)

TLSync: support for multiple fast barriers using on-chip transmission lines. - Jungju Oh; Milos Prvulovic; Alenka G. Zajic (ISCA, 2011)

Traffic steering between a low-latency unswitched TL ring and a high-throughput switched on-chip interconnect. - Jungju Oh; Alenka G. Zajic; Milos Prvulovic (PACT, 2013)

Efficient hardware and software assist for many-core performance. - Jungju Oh (2014)

2.4 ATOMUS: A 5nm 32TFLOPS/128TOPS ML System-on-Chip for Latency Critical Applications. - Chang-Hyo Yu; Hyo-Eun Kim; Sungho Shin; Kyeongryeol Bong; Hyunsuk Kim; Yoonho Boo; Jaewan Bae; Minjae Kwon; Karim Charfi; Jinseok Kim 006; Hongyun Kim; Myeongbo Shim; et al. (ISSCC, 2024)

AMXFP4: Taming Activation Outliers with Asymmetric Microscaling Floating-Point for 4-bit LLM Inference. - Janghwan Lee; Jiwoong Park; Jinseok Kim; Yongjik Kim; Jungju Oh; Jinwook Oh; Jungwook Choi (ACL (Findings), 2025)