TNPU: Supporting Trusted Execution with Tree-less Integrity Protection for Neural Processing Unit. - Sunho Lee 002; Jungwoo Kim 002; Seonjin Na; Jongse Park; Jaehyuk Huh 001 (HPCA, 2022)

Tunable Memory Protection for Secure Neural Processing Units. - Sunho Lee 002; Seonjin Na; Jungwoo Kim 002; Jongse Park; Jaehyuk Huh 001 (ICCD, 2022)

Joint Demosaicing and Deghosting of Time-Varying Exposures for Single-Shot HDR Imaging. - Jungwoo Kim 002; Min H. Kim 001 (ICCV, 2023)

mNPUsim: Evaluating the Effect of Sharing Resources in Multi-core NPUs. - Soojin Hwang; Sunho Lee 002; Jungwoo Kim 002; Hongbeen Kim; Jaehyuk Huh 001 (IISWC, 2023)

Improving Data Reuse in NPU On-chip Memory with Interleaved Gradient Order for DNN Training. - Jungwoo Kim 002; Seonjin Na; Sanghyeon Lee; Sunho Lee 003; Jaehyuk Huh 001 (MICRO, 2023)

Supporting Secure Multi-GPU Computing with Dynamic and Batched Metadata Management. - Seonjin Na; Jungwoo Kim 002; Sunho Lee 002; Jaehyuk Huh 001 (HPCA, 2024)

Hardware-based Heterogeneous Memory Management for Large Language Model Inference. - Soojin Hwang; Jungwoo Kim 002; Sanghyeon Lee; Hongbeen Kim; Jaehyuk Huh 001 (CoRR, 2025)