Seamless SoC Verification Using Virtual Platforms: An Industrial Case Study. - Kyungsu Kang; Sangho Park; Byeongwook Bae; Jungyun Choi; SungGil Lee; Byunghoon Lee; Jong-Bae Lee (DATE, 2019)

On-chip Interconnect Optimization and Validation using Virtual Platform. - Jungyun Choi; Kyungsu Kang; Sangho Park; Seunghan Lee; YoHan Park; Byeongwook Bae; Byunghoon Lee; ByungChul Yoo (ISOCC, 2020)

SRAM on-chip monitoring methodology for high yield and energy efficient memory operation at near threshold voltage. - Taehwan Kim 007; Kwangok Jeong; Jungyun Choi; Taewhan Kim 001; Kyu-Myung Choi (Integr., 2020)

Early HW/SW Co-Verification Using Virtual Platforms. - Jungyun Choi; Kyungsu Kang; Byunghoon Lee; Sangho Park; Jae-Woo Im (ISOCC, 2021)

Hardware Performance Monitoring Methodology at Near-Threshold Computing and Advanced Technology Nodes: From Design to Postsilicon. - Jeongwoo Heo; Kwangok Jeong; Jungyun Choi; Taewhan Kim 001; Kyumyung Choi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)