An IF input continuous-time sigma-delta analog-digital converter with high image rejection. - Junhua Shen; Kong-Pang Pun; Chiu-sing Choy; Cheong-Fat Chan (ICECS, 2004)

A 0.5-V 8-bit 10-Ms/s Pipelined ADC in 90-nm CMOS. - Junhua Shen; Peter R. Kinget (IEEE J. Solid State Circuits, 2008)

Current-Charge-Pump Residue Amplification for Ultra-Low-Power Pipelined ADCs. - Junhua Shen; Peter R. Kinget (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

A 14b 80MS/s SAR ADC with 73.6dB SNDR in 65nm CMOS. - Ron Kapusta; Junhua Shen; Steven Decker; Hongxing Li; Eitake Ibaragi (ISSCC, 2013)

A 14b 80 MS/s SAR ADC With 73.6 dB SNDR in 65 nm CMOS. - Ron Kapusta; Junhua Shen; Steven Decker; Hongxing Li; Eitake Ibaragi; Haiyang Zhu (IEEE J. Solid State Circuits, 2013)

A 16 bit linear passive-charge-sharing SAR ADC in 55nm CMOS. - Mark Maddox; Baozhen Chen; Michael C. W. Coln; Ron Kapusta; Junhua Shen; Lalinda Fernando (A-SSCC, 2016)

Edge-Pursuit Comparator: An Energy-Scalable Oscillator Collapse-Based Comparator With Application in a 74.1 dB SNDR and 20 kS/s 15 b SAR ADC. - Minseob Shim; Seokhyeon Jeong; Paul D. Myers; Suyoung Bang; Junhua Shen; Chulwoo Kim; Dennis Sylvester; David T. Blaauw; Wanyeong Jung (IEEE J. Solid State Circuits, 2017)

Edge pursuit comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC. - Minseob Shim; Seokhyeon Jeong; Paul D. Myers; Suyoung Bang; Junhua Shen; Chulwoo Kim; Dennis Sylvester; David T. Blaauw; Wanyeong Jung (ASP-DAC, 2018)

A 12-Bit 31.1UW 1MS/S SAR ADC with On-Chip Input-Signal-Independent Calibration Achieving 100.4DB SFDR Using 256FF Sampling Capacitance. - Junhua Shen; Akira Shikata; Anping Liu; Frederick Chalifoux (VLSI Circuits, 2018)

Precision Passive-Charge-Sharing SAR ADC: Analysis, Design, and Measurement Results. - Baozhen Chen; Mark Maddox; Michael C. W. Coln; Ye Lu; Junhua Shen; Lalinda Fernando (IEEE J. Solid State Circuits, 2018)

Corrections to "Precision Passive-Charge-Sharing SAR ADC: Analysis, Design, and Measurement Results". - Baozhen Chen; Mark Maddox; Michael C. W. Coln; Ye Lu; Junhua Shen; Lalinda D. Fernando (IEEE J. Solid State Circuits, 2018)

A 16-bit 16-MS/s SAR ADC With On-Chip Calibration in 55-nm CMOS. - Junhua Shen; Akira Shikata; Lalinda Fernando; Ned Guthrie; Baozhen Chen; Mark Maddox; Nikhil Mascarenhas; Ron Kapusta; Michael C. W. Coln (IEEE J. Solid State Circuits, 2018)

A 12-Bit 31.1- $ mu$ W 1-MS/s SAR ADC With On-Chip Input-Signal-Independent Calibration Achieving 100.4-dB SFDR Using 256-fF Sampling Capacitance. - Junhua Shen; Akira Shikata; Anping Liu; Baozhen Chen; Frederick Chalifoux (IEEE J. Solid State Circuits, 2019)

Multi-channel electrohysterography enabled uterine contraction characterization and its effect in delivery assessment. - Junhua Shen; Yan Liu; Meiyu Zhang; Alain Pumir; Liangshan Mu; Baohua Li; Jinshan Xu (Comput. Biol. Medicine, 2023)

Sample Point Classification of Abdominal ECG Through CNN-Transformer Model Enables Efficient Fetal Heart Rate Detection. - Zhenqin Chen; Kaixiao Zheng; Junhua Shen; Yiwei Lin; Yan Feng; Jinshan Xu (IEEE Trans. Instrum. Meas., 2024)

24.8 A 12GS/s 9b 16× Time-Interleaved SAR ADC in 16nm FinFET. - Junhua Shen; Wei-Hung Chen; Efram Burlingame; Stephen Weinreich; Michael Elliott; Stuart McCracken; Jack Kenney; Janet Brunsilius; Anil Korkmaz; Enrique Alvarez-Fontecilla; Nevena Rakuljic; Ushma Mehta; et al. (ISSCC, 2025)