Hardware synthesis from a restricted class of LOTOS expressions. - Teruo Higashino; Keiichi Yasumoto; Junji Kitamichi; Kenichi Taniguchi (PSTV, 1994)

Automatic Correctness Proof of the Implementation of Synchronous Sequential Circuits Using an Algebraic Approach. - Junji Kitamichi; Sumio Morioka; Teruo Higashino; Kenichi Taniguchi (TPCD, 1994)

An evolutionary neural network algorithm for max cut problems. - Nobuo Funabiki; Junji Kitamichi; Seishi Nishikawa (ICNN, 1997)

A three-stage greedy and neural-network approach for the subgraph isomorphism problem. - Nobuo Funabiki; Junji Kitamichi (SMC, 1998)

A gradual neural-network algorithm for jointly time-slot/code assignment problems in packet radio networks. - Nobuo Funabiki; Junji Kitamichi (IEEE Trans. Neural Networks, 1998)

An evolutionary neural network approach for module orientation problems. - Nobuo Funabiki; Junji Kitamichi; Seishi Nishikawa (IEEE Trans. Syst. Man Cybern. Part B, 1998)

Formal Verification Method for Combinatorial Circuits at High Level Design. - Junji Kitamichi; Hiroyuki Kageyama; Nobuo Funabiki (ASP-DAC, 1999)

Formal Design Verification for Correctness of Pipelined Microprocessors with Out-of-order Instruction Execution. - Takashi Takenaka; Junji Kitamichi; Teruo Higashino; Kenichi Taniguchi (ASP-DAC, 1999)

A gradual neural network approach for FPGA segmented channel routing problems. - Nobuo Funabiki; Makiko Yoda; Junji Kitamichi; Seishi Nishikawa (IEEE Trans. Syst. Man Cybern. Part B, 1999)

A Conformance Testing Method for Communication Protocols Modeled as Concurrent DFSMs. - Atsushi Fukada; Akio Nakata; Junji Kitamichi; Teruo Higashino; Ana R. Cavalli (ICOIN, 2001)

A Master-Slave Adaptive Load-Distribution Processor Model on PCA. - Toshiyuki Ito; Junji Kitamichi; Kenichi Kuroda; Yuichi Okuyama (IPDPS, 2005)

A Hardware Algorithm for the Minimum p-Quasi Clique Cover Problem. - Shuichi Watanabe; Junji Kitamichi; Kenichi Kuroda (FPL, 2007)

Proposal of Dynamic Module Library for System Level Modeling and Simulation of Dynamically Reconfigurable Systems. - Kenji Asano; Junji Kitamichi; Kenichi Kuroda (VLSI Design, 2007)

Optimizing Two-Dimensional Continuous Dynamic Programming for Cell Broadband Engine Processors. - Takahiro Machino; Shin-ya Iwazaki; Yuichi Okuyama; Junji Kitamichi; Kenichi Kuroda; Ryuichi Oka (FCST, 2008)

A Modeling of a Dynamically Reconfigurable Processor Using SystemC. - Junji Kitamichi; Koji Ueda; Kenichi Kuroda (VLSI Design, 2008)

Dynamic Module Library for System Level Modeling and Simulation of Dynamically Reconfigurable Systems. - Kenji Asano; Junji Kitamichi; Kenichi Kuroda (J. Comput., 2008)

Programmable wireless sensor node featuring low-power FPGA and microcontroller. - Shoichi Yamaguchi; Toshiaki Miyazaki; Junji Kitamichi; Song Guo 001; Tsuneo Tsukahara; Takafumi Hayashi (iCAST/UMEDIA, 2013)

Evolution of Software-Defined Sensor Networks. - Deze Zeng; Toshiaki Miyazaki; Song Guo 001; Tsuneo Tsukahara; Junji Kitamichi; Takafumi Hayashi (MSN, 2013)

A software defined wireless sensor network. - Toshiaki Miyazaki; Shoichi Yamaguchi; Koji Kobayashi; Junji Kitamichi; Song Guo 001; Tsuneo Tsukahara; Takafumi Hayashi (ICNC, 2014)

DASN: demand-addressable sensor network for active information acquisition. - Toshiaki Miyazaki; Hiroki Iwata; Koji Kobayashi; Shoichi Yamaguchi; Deze Zeng; Song Guo 001; Junji Kitamichi; Takafumi Hayashi; Tsuneo Tsukahara (ICUIMC, 2014)

On-demand Customizable Wireless Sensor Network. - Toshiaki Miyazaki; Peng Li 017; Song Guo 001; Junji Kitamichi; Takafumi Hayashi; Tsuneo Tsukahara (ANT/SEIT, 2015)

Proposing a Highly Reliable Real-Time Operating System for a Processor with a Fault Self-Detecting Mechanism. - Hiroki Saito; Yoichi Tomioka; Junji Kitamichi (ICESS, 2016)