An Interprocedural Parallelizing Compiler and Its Support for Memory Hierarchy Research. - Trung N. Nguyen; Junjie Gu; Zhiyuan Li 001 (LCPC, 1995)

Symbolic Array Dataflow Analysis for Array Privatization and Program Parallelization. - Junjie Gu; Zhiyuan Li 001; Gyungho Lee (SC, 1995)

Experience with Efficient Array Data-Flow Analysis for Array Privatization. - Junjie Gu; Zhiyuan Li 001; Gyungho Lee (PPoPP, 1997)

A Hierarchical Reasoning System for Automatic Program Parallelization. - Zhiyuan Li 001; Junjie Gu (Int. J. Artif. Intell. Tools, 2000)

Efficient Interprocedural Array Data-Flow Analysis for Automatic Program Parallelization. - Junjie Gu; Zhiyuan Li 001 (IEEE Trans. Software Eng., 2000)

Interprocedural Analysis Based on Guarded Array Regions. - Zhiyuan Li 001; Junjie Gu; Gyungho Lee (Compiler Optimizations for Scalable Parallel Systems Languages, 2001)

Adaptive inferential feed-forward control algorithm and application with reduced model. - Junjie Gu; Luanying Zhang; Zhiming Qin (ICARCV, 2008)

Determination of the Feasibility Regions of Control Variables in Coordinated Control System of Coal-Fired Unit. - Junjie Gu; Yanling Ren; Zhi Yang (CSEE (2), 2011)

Investigate Performance of Expected Maximization on the Knowledge Tracing Model. - Junjie Gu; Hang Cai; Joseph E. Beck (Intelligent Tutoring Systems, 2014)

Personalizing Knowledge Tracing: Should We Individualize Slip, Guess, Prior or Learn Rate? - Junjie Gu; Yutao Wang; Neil T. Heffernan (Intelligent Tutoring Systems, 2014)

Simulation of ultrasonic testing for resolution of corrosion detection in pipes. - Qianyue Qian; Houman Hanachi; Jie Liu 015; Junjie Gu; Fai Ma; Ashok Koul; Avisekh Banerjee (ICPHM, 2016)

Design and Temperature Reliability Testing for A 0.6-2.14GHz Broadband Power Amplifier. - Qian Lin; Qian-Fu Cheng; Junjie Gu; Yuanyuan Zhu; Chao Chen; Haipeng Fu (J. Electron. Test., 2016)

Fast and Automated Electromigration Analysis for CMOS RF PA Design. - Junjie Gu; Haipeng Fu; Weicong Na; Qijun Zhang; Jianguo Ma (J. Electron. Test., 2017)

IGC: The Open Source Intel Graphics Compiler. - Anupama Chandrasekhar; Gang Chen; Po-Yu Chen; Wei-Yu Chen; Junjie Gu; Peng Guo; Shruthi Hebbur Prasanna Kumar; Guei-Yuan Lueh; Pankaj Mistry; Wei Pan; Thomas Raoux; Konrad Trifunovic (CGO, 2019)

Modelling and verification of fatigue damage for compliant mechanisms. - Changli Liu; Zhuming Bi; Jilin Ran; Junjie Gu; Xuejun Wang; Chris Zhang 003 (Robotica, 2019)

Development of an object-oriented framework for the vibration characteristic computation of multibody systems. - Gangli Chen; Xiaoting Rui 001; Junjie Gu; Xiaoyun Zeng; Xingbao Liu (Adv. Eng. Softw., 2020)

A Two-Way Power-Combining 60GHz CMOS Power Amplifier with 22.0% PAE and 19.4dBm Psat in 65nm Bulk CMOS. - Junjie Gu; Guixiang Jin; Hongtao Xu; Hao Min; Na Yan (ISCAS, 2021)

Improved modeling and active disturbance rejection control of tank gun control system. - Huaqing Zheng; Xiaoting Rui 001; Jianshu Zhang; Shujun Zhang; Junjie Gu (J. Syst. Control. Eng., 2022)

A 26-30GHz Digitally-Controlled Variable Gain Power Amplifier with Phase Compensation and Third Order Nonlinearity Cancellation Technique. - Haoqi Qin; Junjie Gu; Hao Xu 005; Weitian Liu; Kefeng Han; Rui Yin; Zongming Duan; Hao Gao 001; Na Yan (A-SSCC, 2023)

Network Intrusion Detection Based on Explainable Artificial Intelligence. - Yiwen Wang; Lei Xu 015; Wanli Liu; Rongzhen Li; Junjie Gu (Wirel. Pers. Commun., 2023)

SDN Security Channel Constructed Using SM9. - Dan Wang; Liangyu Dong; Hua Tang; Junjie Gu; Ziwei Liu; Xintong You (ISDFS, 2024)

5.1 A 5-to-16GHz Reconfigurable Quadrature Receiver with 50% Duty-Cycle LO and IQ-Leakage Suppression. - Hao Xu 005; Junyan Bi; Tenghao Zou; Weitao He; Yaxin Zeng; Junjie Gu; Ziyang Jiao; Shubin Liu; Zhangming Zhu; Na Yan (ISSCC, 2024)

An innovative unsupervised gait recognition based tracking system for safeguarding large-scale nature reserves in complex terrain. - Chichun Zhou 001; Xiaolin Guan; Zhuohang Yu; Yao Shen; Zhen-Yu Zhang; Junjie Gu (Expert Syst. Appl., 2024)

7.10 An 8-to-28GHz 8-Phase Clock Generator Using Dual-Feedback Ring Oscillator in 28nm CMOS. - Yechen Tian; Junjie Gu; Weitao He; Shuai Liu; Hao Xu; Na Yan (ISSCC, 2025)

Fast parametric modeling of visualized simulation and design for tracked vehicle system. - Pingxin Wang; Xiaoting Rui 001; Junjie Gu; Kai Huang; Lei Zhou; Min Jiang (Adv. Eng. Softw., 2025)

DRL-AdCAR: Adaptive Coding-Aware Routing With Maximum Coding Opportunities and High-Quality via Deep Reinforcement Learning in FANET. - Bo Song; Lei Xu 015; Ping Wang 001; Xiulin Qiu; Yaqi Ke; Junjie Gu; Yuwang Yang; Anhong Chen; Fan Zhang (IEEE Trans. Veh. Technol., 2025)

Design and Analysis of a 26-32-GHz 6-bit Passive Vector Modulation Phase Shifter for CMOS Bidirectional Transceiver. - Yechen Tian; Yutong Zhang; Junjie Gu; Hao Xu 005; Weitian Liu; Rui Yin; Zongming Duan; Hao Gao 001; Na Yan (IEEE Trans. Very Large Scale Integr. Syst., 2025)

A 25-31-GHz Compact True Power Detector With >33-dB Dynamic Range and Intrinsic Phase Offset Compensation in 40-nm Bulk CMOS. - Haoqi Qin; Junjie Gu; Hao Xu 005; Zhiwei Xu 003; Pengcheng Jia; Na Yan (IEEE J. Solid State Circuits, 2025)

A 5-18-GHz Reconfigurable Quadrature Receiver With Enhanced I-Q Isolation and 100-500-MHz Baseband Bandwidth. - Junyan Bi; Hao Xu 005; Tenghao Zou; Yaxin Zeng; Yechen Tian; Weitao He; Junjie Gu; Ziyang Jiao; Shubin Liu; Zhangming Zhu; Na Yan (IEEE J. Solid State Circuits, 2025)