Realization of a Power-Efficient Transmitter Based on Integrated Artificial Neural Network. - Deyu Kong; Shaogang Hu; Yuancong Wu; Junjie Wang 008; Canlong Xiong; Qi Yu 002; Zhengyu Shi; Zhen Liu 013; Tupei Chen; You Yin; Sumio Hosaka; Yang Liu 062 (IEEE Access, 2018)

Predicting House Price With a Memristor-Based Artificial Neural Network. - Junjie Wang 008; Shaogang Hu; X. T. Zhan; Q. Luo; Qi Yu 002; Zhen Liu 013; Tupei Chen; Y. Yin; Sumio Hosaka; Yang Liu 062 (IEEE Access, 2018)

Design of a Neural Network-Based VCO With High Linearity and Wide Tuning Range. - Rui Guo; Kun Qian; Jinping Wei; Tupei Chen; Yanchen Liu; Deyu Kong; Junjie Wang 008; Yuancong Wu; Shaogang Hu; Qi Yu 002; Yang Liu 062 (IEEE Access, 2019)

Study of Recall Time of Associative Memory in a Memristive Hopfield Neural Network. - Deyu Kong; Shaogang Hu; Junjie Wang 008; Zhen Liu 013; Tupei Chen; Qi Yu 002; Yang Liu 062 (IEEE Access, 2019)

Implementation of a Low Noise Amplifier With Self-Recovery Capability. - Yanchen Liu; Caizhi Zhang; Tupei Chen; Deyu Kong; Rui Guo; Junjie Wang 008; Yuancong Wu; Shaogang Hu; L. M. Rong; Qi Yu 002; Yang Liu 062 (IEEE Access, 2019)

A Neuromorphic-Hardware Oriented Bio-Plausible Online-Learning Spiking Neural Network Model. - Chunming Qiao; Shaogang Hu; Junjie Wang 008; C. M. Zhang; Tupei Chen; Ning Ning 002; Qi Yu 002; Yang Liu 062 (IEEE Access, 2019)

An energy-efficient deep convolutional neural networks coprocessor for multi-object detection. - Yuancong Wu; Junjie Wang 008; Kun Qian; Yanchen Liu; Rui Guo; Shaogang Hu; Qi Yu 002; Tupei Chen; Yang Liu 062; Limei Rong (Microelectron. J., 2020)

Application of Deep Compression Technique in Spiking Neural Network Chip. - Yanchen Liu; Kun Qian; Shaogang Hu; Kun An; Sheng Xu; Xitong Zhan; Junjie Wang 008; Rui Guo; Yuancong Wu; Tupei Chen; Qi Yu 002; Yang Liu 062 (IEEE Trans. Biomed. Circuits Syst., 2020)

A Programmable Logic-in-Memory Architecture Based on 22nm Fully DepletedSilicon on Insulator Technology. - Yihe Liu; Junjie Wang 008; Shuang Liu 007; Mingyuan Sun; Kai Tang; Guohui Ren; Xindi Zhao; Mingliang Sun; Yang Liu 062 (CECCT, 2023)

FPGA-implemented Memristor-based Transient Chaotic Neural Network for AES Edge Encryption. - Hongzhe Wang; Kunsong Liu; Yi'an Liu 001; Junjie Wang 008; Mingyuan Sun; Kai Tang; Guohui Ren; Xindi Zhao; Yang Liu 062 (CECCT, 2023)

FuzzJIT: Oracle-Enhanced Fuzzing for JavaScript Engine JIT Compiler. - Junjie Wang 008; Zhiyi Zhang; Shuang Liu 007; Xiaoning Du 001; Junjie Chen 003 (USENIX Security Symposium, 2023)

An Area- and Energy-Efficient Spiking Neural Network With Spike-Time-Dependent Plasticity Realized With SRAM Processing-in-Memory Macro and On-Chip Unsupervised Learning. - Shuang Liu 007; Junjie Wang 008; Jingtao Zhou; Shaogang Hu; Qi Yu 002; Tupei Chen; Yang Liu 062 (IEEE Trans. Biomed. Circuits Syst., 2023)

Ultra-High-Speed Accelerator Architecture for Convolutional Neural Network Based on Processing-in-Memory Using Resistive Random Access Memory. - Hongzhe Wang; Junjie Wang 008; Hao Hu; Guo Li; Shaogang Hu; Qi Yu 002; Zhen Liu 013; Tupei Chen; Shijie Zhou; Yang Liu 062 (Sensors, 2023)

Live Demonstration for Input-Sparsity-Aware RRAM Processing-in-Memory Chip. - Junjie Wang 008; Shuang Liu 007; Ruicheng Pan; Shiqin Yan; Yihe Liu; Yang Liu 062 (ISCAS, 2024)

Design and implementation of a charge-sharing in-memory-computing macro with sparse feature for quantized neural network. - Yihe Liu; Junjie Wang 008; Shuang Liu 007; Mingyuan Sun; Xiaoyang Zhang; Jingtao Zhou; Shiqin Yan; Ruicheng Pan; Hao Hu; Yang Liu 062 (Microelectron. J., 2024)

Design and Implementation of a Hybrid, ADC/DAC-Free, Input-Sparsity-Aware, Precision Reconfigurable RRAM Processing-in-Memory Chip. - Junjie Wang 008; Teng Zhang; Shuang Liu 007; Yihe Liu; Yuancong Wu; Shaogang Hu; Tupei Chen; Yang Liu 062; Yuchao Yang 001; Ru Huang 001 (IEEE J. Solid State Circuits, 2024)