Area-efficient one-cycle correction scheme for timing errors in flip-flop based pipelines. - Jongeun Koo; Eunwoo Song; Eunhyeok Park; Dongyoung Kim; Junki Park; Sungju Ryu; Sungjoo Yoo; Jae-Joon Kim (A-SSCC, 2016)

GeCo: classification restricted Boltzmann machine hardware for on-chip learning. - Wooseok Yi; Junki Park; Jae-Joon Kim (RSP, 2017)

Maximizing system performance by balancing computation loads in LSTM accelerators. - Junki Park; Jaeha Kung; Wooseok Yi; Jae-Joon Kim (DATE, 2018)

Peregrine: A Flexible Hardware Accelerator for LSTM with Limited Synaptic Connection Patterns. - Jaeha Kung; Junki Park; Sehun Park; Jae-Joon Kim (DAC, 2019)

Low-overhead, one-cycle timing-error detection and correction technique for flip-flop based pipelines. - Jongeun Koo; Eunhyeok Park; Dongyoung Kim; Junki Park; Sungju Ryu; Sungjoo Yoo; Jae-Joon Kim (IEICE Electron. Express, 2019)

OPTIMUS: OPTImized matrix MUltiplication Structure for Transformer neural network accelerator. - Junki Park; Hyunsung Yoon; Daehyun Ahn; Jungwook Choi; Jae-Joon Kim (MLSys, 2020)

Balancing Computation Loads and Optimizing Input Vector Loading in LSTM Accelerators. - Junki Park; Wooseok Yi; Daehyun Ahn; Jaeha Kung; Jae-Joon Kim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

GeCo: Classification Restricted Boltzmann Machine Hardware for On-Chip Semisupervised Learning and Bayesian Inference. - Wooseok Yi; Junki Park; Jae-Joon Kim (IEEE Trans. Neural Networks Learn. Syst., 2020)

NN-LUT: neural approximation of non-linear operations for efficient transformer inference. - Joonsang Yu; Junki Park; Seongmin Park 003; Minsoo Kim; Sihwa Lee; Dong Hyun Lee; Jungwook Choi (DAC, 2022)