Block-Based Spiking Neural Network Hardware with Deme Genetic Algorithm. - Junran Pu; Vishnu P. Nambiar; Anh-Tuan Do; Wang Ling Goh (ISCAS, 2019)

Coverage Driven Verification Methodology for Asynchronous Neuromorphic Routers. - Yun Kwan Lee; Vishnu P. Nambiar; Junran Pu; Wang Ling Goh; Anh-Tuan Do (SoCC, 2019)

Ower and Area Efficient Router with Automated Clock Gating for Neuromorphic Computing. - Junran Pu; Vishnu P. Nambiar; Aarthy Mani; Wang Ling Goh; Anh-Tuan Do (SoCC, 2019)

0.5V 4.8 pJ/SOP 0.93µW Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron. - Vishnu P. Nambiar; Junran Pu; Yun Kwan Lee; Aarthy Mani; Tao Luo 014; L. Yang; Eng-Kiat Koh; Ming Ming Wong; Fei Li 015; Wang Ling Goh; Anh Tuan Do (A-SSCC, 2020)

Scalable Block-Based Spiking Neural Network Hardware with a Multiplierless Neuron Model. - Vishnu P. Nambiar; Eng-Kiat Koh; Junran Pu; Aarthy Mani; Ming Ming Wong; Li Fei; Wang Ling Goh; Anh Tuan Do (ISCAS, 2020)

A 5.28-mm² 4.5-pJ/SOP Energy-Efficient Spiking Neural Network Hardware With Reconfigurable High Processing Speed Neuron Core and Congestion-Aware Router. - Junran Pu; Wang Ling Goh; Vishnu P. Nambiar; Ming Ming Wong; Anh Tuan Do (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Energy Efficient 0.5V 4.8pJ/SOP 0.93μW Leakage/Core Neuromorphic Processor Design. - Vishnu P. Nambiar; Junran Pu; Yun Kwan Lee; Aarthy Mani; Eng-Kiat Koh; Ming Ming Wong; Fei Li 015; Wang Ling Goh; Anh Tuan Do (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A Low-Cost High-Throughput Digital Design of Biorealistic Spiking Neuron. - Junran Pu; Wang Ling Goh; Vishnu P. Nambiar; Yi Sheng Chong; Anh Tuan Do (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A Low Power and Low Area Router With Congestion-Aware Routing Algorithm for Spiking Neural Network Hardware Implementations. - Junran Pu; Wang Ling Goh; Vishnu P. Nambiar; Anh-Tuan Do (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency. - Liwei Yang; Huaipeng Zhang; Tao Luo 014; Chuping Qu; Myat Thu Linn Aung; Yingnan Cui; Jun Zhou 014; Ming Ming Wong; Junran Pu; Anh Tuan Do; Rick Siow Mong Goh; Weng-Fai Wong (Neurocomputing, 2022)

Corrigendum to "Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency" [Neurocomputing (2022) 128-140]. - Liwei Yang; Huaipeng Zhang; Tao Luo 014; Chuping Qu; Myat Thu Linn Aung; Yingnan Cui; Jun Zhou 014; Ming Ming Wong; Junran Pu; Anh Tuan Do; Rick Siow Mong Goh; Weng-Fai Wong (Neurocomputing, 2022)

A 110nW Always-on Keyword Spotting Chip using Spiking CNN in 40nm CMOS. - Chen Shen; Junran Pu; Yi Sheng Chong; Zhongyi Zhang; Wang Ling Goh; Bin Zhao; Anh Tuan Do; Yuan Gao 011 (ISCAS, 2023)