Device-physics-based analytical model for SET pulse in sub-100 nm bulk CMOS Process. - Junrui Qin; Shuming Chen; Biwei Liu; Bin Liang; Jianjun Chen (Sci. China Inf. Sci., 2012)

Multiple nodes upset tolerance DICE latch based on on-state transistor. - Jianguo Hu; Zhikui Duan; Junrui Qin (IEICE Electron. Express, 2014)