A Single-Channel 2.6GS/s 10b Dynamic Pipelined ADC with Time-Assisted Residue Generation Scheme Achieving Intrinsic PVT Robustness. - Junyan Hao; Minglei Zhang; Yanbo Zhang; Shubin Liu; Zhangming Zhu; Yan Zhu 001; Chi-Hang Chan; Rui Paulo Martins (ISSCC, 2023)

A Single-Channel 70dB-SNDR 100MHz-BW 4th-Order Noise-Shaping Pipeline SAR ADC with Residue Amplifier Error Shaping. - Yanbo Zhang; Junyan Hao; Shubin Liu; Zhangming Zhu; Yan Zhu 001; Chi-Hang Chan; Rui Paulo Martins (ISSCC, 2023)

An offset and gain error calibration method in high-precision SAR ADCs. - Junyan Hao; Yi Shen 007; Angyang Li; Min Wang; Qing Zou; Zheng Qiu; Shubin Liu; Zhangming Zhu (Microelectron. J., 2023)

An 8-bit 1.5-GS/s Two-Step SAR ADC With Embedded Interstage Gain. - Yi Shen 007; Junyan Hao; Shubin Liu; Zeshuai An; Dengquan Li; Ruixue Ding; Zhangming Zhu (IEEE Trans. Very Large Scale Integr. Syst., 2023)

A 14b 180MS/s Pipeline-SAR ADC With Adaptive-Region-Selection Technique and Gain Error Calibration. - Junyan Hao; Yi Shen 007; Jin Zhang 034; Yanbo Zhang; Shubin Liu; Zhangming Zhu (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

An Intrinsically PVT Robust 10-bit 2.6-GS/s Dynamic Pipelined ADC With Dual-Path Time-Assisted Residue Generation Scheme. - Junyan Hao; Minglei Zhang; Zijian Liu; Yanbo Zhang; Shubin Liu; Zhangming Zhu; Yan Zhu 001; Rui Paulo Martins; Chi-Hang Chan (IEEE J. Solid State Circuits, 2025)