System Architecture and Software Stack for GDDR6-AiM. - Yongkee Kwon; Kornijcuk Vladimir; Nahsung Kim; Woojae Shin; Jongsoon Won; Minkyu Lee; Hyunha Joo; Haerang Choi; Guhyun Kim; Byeongju An; Jeongbin Kim 001; Jaewook Lee; et al. (HCS, 2022)

A 1ynm 1.25V 8Gb, 16Gb/s/pin GDDR6-based Accelerator-in-Memory supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep-Learning Applications. - Seong Ju Lee; Kyu-Young Kim; Sanghoon Oh; Joonhong Park; Gimoon Hong; Dong Yoon Ka; Kyu-Dong Hwang; Jeongje Park; Kyeong Pil Kang; Jungyeon Kim; Junyeol Jeon; Nahsung Kim; et al. (ISSCC, 2022)

A 1ynm 1.25V 8Gb 16Gb/s/Pin GDDR6-Based Accelerator-in-Memory Supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep Learning Application. - Dae-Han Kwon; Seongju Lee; Kyuyoung Kim; Sanghoon Oh; Joonhong Park; Gimoon Hong; Dongyoon Ka; Kyu-Dong Hwang; Jeongje Park; Kyeong Pil Kang; Jungyeon Kim; Junyeol Jeon; et al. (IEEE J. Solid State Circuits, 2023)

13.4 A 48GB 16-High 1280GB/s HBM3E DRAM with All-Around Power TSV and a 6-Phase RDQS Scheme for TSV Area Optimization. - Jinhyung Lee; Kyungjun Cho; Chang Kwon Lee; Yeonho Lee 002; Jae-Hyung Park; Su-Hyun Oh; Yucheon Ju; Chunseok Jeong; Ho Sung Cho; Jaeseung Lee; Tae-Sik Yun; Jin Hee Cho; et al. (ISSCC, 2024)