Reconfigurable Approximate Multiplication Architecture for CNN-Based Speech Recognition Using Wallace Tree Tensor Multiplier Unit. - Junyi Qian; Yuanyuan Jiang; Zilong Zhang; Renyuan Zhang; Ziyu Wang; Bo Liu 019 (NANOARCH, 2021)

TEPD: A Compound Timing Detection of Both Data-Transition and Path-Activation for Reliable In-Situ Timing Error Detection and Correction in 28nm CMOS. - Zhengguo Shen; Junyi Qian; Keran Li; Ziyu Li; Lishuo Deng; Weiwei Shan (A-SSCC, 2023)

A 608nW Near-Microphone Keyword-Spotting Chip Using Real-Point Serial FFT-Based MFCC and Temporal Depthwise Separable CNN in 28nm CMOS. - Cai Li; Haochang Zhi; Long Chen; Kaiyue Yang; Junyi Qian; Zhihao Yan; Lixuan Zhu; Weiwei Shan (CICC, 2023)

A 1.23μJ/Inference, All-Digital Shuffle-Type Group-CNN Accelerator in 28nm CMOS With 85.8% Accuracy on CIFAR-10. - Long Chen; Cai Li; Tao Wang; Junyi Qian; Weiwei Shan (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

AAD-KWS: A Sub-μ W Keyword Spotting Chip With an Acoustic Activity Detector Embedded in MFCC and a Tunable Detection Window in 28-nm CMOS. - Weiwei Shan; Junyi Qian; Lixuan Zhu; Jun Yang 006; Cheng Huang 005; Hao Cai 001 (IEEE J. Solid State Circuits, 2023)

An All-Digital, 1.92-7.32 mV/LSB, 0.5-2 GS/s Sample Rate, and 0-Latency Prediction Voltage Sensor With Dynamic PVT Calibration for Droop Detection and AVS System. - Yuxuan Du; Junyi Qian; Zhuo Chen; Weiwei Shan (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

An Adaptive Wide-Voltage-Range Droop Detection and Protection System Assisted with Timing Error Detection in 28nm CMOS. - Lishuo Deng; Zhengguo Shen; Zhuo Chen; Cai Li; Junyi Qian; Yuxuan Du; Kaize Zhou; Keran Li; Ruidong Li; Tuo Li; Xiaofeng Zou; Weiwei Shan (CICC, 2024)

A 22nm Variation-Tolerant Clock Duty-Cycle Controller for Mitigating Aging-Induced Clock Duty-Cycle Distortion with Path Replica. - Lishuo Deng; Zhiting Li; Changwei Yan; Junyi Qian; Cai Li; Ruidong Li; Tuo Li; Weiwei Shan (ICTA, 2024)

14.2 Proactive Voltage Droop Mitigation Using Dual-Proportional-Derivative Control Based on Current and Voltage Prediction Applied to a Multicore Processor in 28nm CMOS. - Weiwei Shan; Kaize Zhou; Keran Li; Yuxuan Du; Zhuo Chen; Junyi Qian; Haitao Ge; Jun Yang 006; Xin Si (ISSCC, 2024)

A runtime-reconfigurable convolutional engine using tensor multiplication with multiple computing modes in 22-nm CMOS. - Junyi Qian; Yuxin Ji; Cai Li (Microelectron. J., 2024)

A 0.61-μW Fully Integrated Keyword-Spotting ASIC With Real-Point Serial FFT-Based MFCC and Temporal Depthwise Separable CNN. - Cai Li; Haochang Zhi; Kaiyue Yang; Junyi Qian; Zhihao Yan; Lixuan Zhu; Chao Chen 030; Xi Wang 009; Weiwei Shan (IEEE J. Solid State Circuits, 2024)

DSC-TRCP: Dynamically Self-Calibrating Tunable Replica Critical Paths Based Timing Monitoring for Variation Resilient Circuits. - Yuxuan Du; Junyi Qian; Zhengguo Shen; Chengjun Wu; Weiwei Shan; Xi Wang 009 (IEEE J. Solid State Circuits, 2024)

A 40nm Early-Warning AVFS Design with Path Activation-Based Monitoring Point Optimization. - Cai Li; Zhuoyuan Li; Kaize Zhou; Lishuo Deng; Junyi Qian; Xiaojie Yin; Kana Meng; Weiwei Shan (ISCAS, 2025)

A 4.69-TOPS/W Training, 2.34-μJ/Image Inference On-Chip Training Accelerator With Inference-Compatible Backpropagation and Design Space Exploration in 28-nm CMOS. - Junyi Qian; Haitao Ge; Yicheng Lu; Weiwei Shan (IEEE J. Solid State Circuits, 2025)

An On-Chip-Training Keyword-Spotting Chip Using Interleaved Pipeline and Computation-in-Memory Cluster in 28-nm CMOS. - Junyi Qian; Cai Li; Long Chen; Ruidong Li; Tuo Li; Peng Cao 002; Xin Si; Weiwei Shan (IEEE Trans. Very Large Scale Integr. Syst., 2025)