A 20 kbit associative memory LSI for artificial intelligence machines. - Takeshi Ogura; Junzo Yamada; Shin-Ichiro Yamada; Masa'aki Tan'no (IEEE J. Solid State Circuits, 1989)

Fast-access BiCMOS SRAM architecture with a VSS generator. - Takakuni Douseki; Yasuo Ohmori; Hideo Yoshino; Junzo Yamada (IEEE J. Solid State Circuits, 1991)

Pipelined, time-sharing access technique for an integrated multiport memory. - Ken-ichi Endo; Tsuneo Matsumura; Junzo Yamada (IEEE J. Solid State Circuits, 1991)

1 V power supply, low-power consumption A/D conversion technique with swing-suppression noise shaping. - Yasuyuki Matsuya; Junzo Yamada (IEEE J. Solid State Circuits, 1994)

1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS. - Shin'ichiro Mutoh; Takakuni Douseki; Yasuyuki Matsuya; Takahko Aoki; Satoshi Shigematsu; Junzo Yamada (IEEE J. Solid State Circuits, 1995)

A 1-V multithreshold-voltage CMOS digital signal processor for mobile phone application. - Shinichiro Mutoh; Satoshi Shigematsu; Yasuyuki Matsuya; H. Fukuda; T. Kaneko; Junzo Yamada (IEEE J. Solid State Circuits, 1996)

A 0.5-V MTCMOS/SIMOX logic gate. - Takakuni Douseki; Satoshi Shigematsu; Junzo Yamada; Mitsuru Harada; Hiroshi Inokawa; Toshiaki Tsuchiya (IEEE J. Solid State Circuits, 1997)

A 1-V high-speed MTCMOS circuit scheme for power-down application circuits. - Satoshi Shigematsu; Shin'ichiro Mutoh; Yasuyuki Matsuya; Yasuyuki Tanabe; Junzo Yamada (IEEE J. Solid State Circuits, 1997)

2-GHz RF front-end circuits in CMOS/SIMOX operating at an extremely low voltage of 0.5 V. - Mitsuru Harada; Tsuneo Tsukahara; Junichi Kodate; Akihiro Yamagishi; Junzo Yamada (IEEE J. Solid State Circuits, 2000)