2Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A Comparative Analysis. - Adrian K. Lutz; Jürg Treichler; Frank K. Gürkaynak; Hubert Kaeslin; Gérard Basler; Antonia Erni; Stephan Reichmuth; Pieter Rommens; Stephan Oetiker; Wolfgang Fichtner (CHES, 2002)

A 11.1-bit ENOB 50-MS/s pipelined A/D converter in 130-nm CMOS without S/H front end. - Jürg Treichler; Qiuting Huang (ESSCIRC, 2010)

Design and failure analysis of logic-compatible multilevel gain-cell-based dram for fault-tolerant VLSI systems. - Pascal Andreas Meinerzhagen; Onur Andiç; Jürg Treichler; Andreas Peter Burg (ACM Great Lakes Symposium on VLSI, 2011)