Jürgen Maier

According to our database, Jürgen Maier authored at least 16 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Detector development for particle physics.

Simon Waid, Jürgen Maier, Philipp Gaggl, Andreas Gsponer, Patrick Sieberer, Maximilian Babeluk, Thomas Bergauer

Elektrotech. Informationstechnik, March, 2024

2023

The Hidden Behavior of a D-Latch.

Jürgen Maier, Andreas Steininger, Robert Najvirt

IEEE Trans. Circuits Syst. I Regul. Pap., April, 2023

2022

Simulation-Based Approaches for Comprehensive Schmitt-Trigger Analyses.

Jürgen Maier, Christian Hartl-Nesic, Andreas Steininger

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

A Simple Hybrid Model for Accurate Delay Modeling of a Multi-Input Gate.

Arman Ferdowsi, Jürgen Maier, Daniel Öhlinger, Ulrich Schmid

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021

The Involution Tool for Accurate Digital Timing and Power Analysis.

Daniel Öhlinger, Jürgen Maier, Matthias Függer, Ulrich Schmid

Integr., 2021

A Composable Glitch-Aware Delay Model.

Jürgen Maier, Daniel Öhlinger, Ulrich Schmid, Matthias Függer, Thomas Nowak

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

Gain and Pain of a Reliable Delay Model.

Jürgen Maier

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

2020

Evaluation Files for the Involution Delay Model.

Jürgen Maier

Dataset, November, 2020

2019

The Involution Tool for Accurate Digital Timingand Power Analysis.

Daniel Öhlinger, Jürgen Maier, Matthias Függer, Ulrich Schmid

Proceedings of the 29th International Symposium on Power and Timing Modeling, 2019

Efficient Metastability Characterization for Schmitt-Triggers.

Jürgen Maier, Andreas Steininger

Proceedings of the 25th IEEE International Symposium on Asynchronous Circuits and Systems, 2019

Transistor-Level Analysis of Dynamic Delay Models.

Jürgen Maier, Matthias Függer, Thomas Nowak, Ulrich Schmid

Proceedings of the 25th IEEE International Symposium on Asynchronous Circuits and Systems, 2019

2018

A faithful binary circuit model with adversarial noise.

Matthias Függer, Jürgen Maier, Robert Najvirt, Thomas Nowak, Ulrich Schmid

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Verifying nonlinear analog and mixed-signal circuits with inputs.

Chuchu Fan, Yu Meng, Jürgen Maier, Ezio Bartocci, Sayan Mitra, Ulrich Schmid

Proceedings of the 6th IFAC Conference on Analysis and Design of Hybrid Systems, 2018

2016

Does Cascading Schmitt-Trigger Stages Improve the Metastable Behavior?

Andreas Steininger, Robert Najvirt, Jürgen Maier

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

The Metastable Behavior of a Schmitt-Trigger.

Andreas Steininger, Jürgen Maier, Robert Najvirt

Proceedings of the 22nd IEEE International Symposium on Asynchronous Circuits and Systems, 2016

2014

Online test vector insertion: A concurrent built-in self-testing (CBIST) approach for asynchronous logic.

Jürgen Maier, Andreas Steininger

Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014